STUSB4500 may hold shared I²C bus low when USB-C is disconnected?

[Circuit]

Hello,

I’m reviewing a design that uses an STM32F767ZIT6 as the I²C_3 master. This I2C_3 bus is shared by:

• U18: PCA9535A I/O expander

• U19: SHT40 temperature and humidity sensor

• U3: STUSB4500 USB-C PD sink controller

SDA and SCL have external 2.2 kΩ pull-ups to 3.3 V. In the schematic, the STUSB4500’s VSYS pin (pin 22) is  connected to GND, and its VDD supply appears to come from the USB VBUS path. Therefore, when no USB-C cable is connected, I believe both VDD and VSYS may be absent.

The STUSB4500 datasheet’s I²C pin description says that SCL and SDA are pulled down when neither VDD nor VSYS is present.

Could you please confirm:

1. With both VDD and VSYS absent, will the STUSB4500 pull SDA and SCL low strongly enough to prevent the STM32 from communicating with the other devices(U18, U19) on the shared bus?

2. Is it acceptable to connect VSYS to the board’s 3.3 V rail so the STUSB4500 remains powered when USB-C is disconnected? Would this affect USB-C attach detection, VBUS monitoring, or PD operation?

3. If VSYS should not be powered in this way, what circuit or bus-isolation approach does ST recommend for a shared I²C bus when the STUSB4500’s VDD is absent?

Thank you.

 

[TDK]

The STUSB4500 datasheet’s I²C pin description says that SCL and SDA are pulled down when neither VDD nor VSYS is present.

Doesn’t this answer your question? I2C pins are open drain, doesn’t take much to pull them down.

 

Connecting VSYS to 3V3 will power the system but has some downside which are shared in the datasheet. It limits your appliction.

 

I’m not ST, but ST probably isn’t going to recommend how to design the system. There are I2C isolator chips out there, or multipliers which could put this chip on a separate bus from the other two chips. If you need the other two chips to communicate when VBAT=0, that is what I would do.