STGAP3SXS RST and DIAG interaction. Fault detection

[Dara]

I am currently using the STGAP3SXS gate driver and would like to clarify the behavior of the DIAG pin when the RST input is driven low. 

I could not determine from the datasheet whether the DIAG output is directly affected by the state of RST.

Could you please confirm the following?

1. When RST is held low and no DESAT fault is present, what is the expected state of DIAG 
2. Is DIAG asserted low only when a DESAT event has occurred?

A brief timing description or state diagram of the interaction between RST, DIAG, RDY  and the DESAT latch would be greatly appreciated.

Thank you for your support.

Best regards,

 

[Peter BENSCH]

Welcome ​@Dara, to the community!

RST is an active-low shutdown and fault-reset input; it does not assert DIAG low by itself. With no latched DESAT fault, DIAG remains released (high impedance and pulled high). A DESAT event pulls DIAG low and latches the fault until RST is held low for the specified reset pulse. RST also forces GOUT low.

RDY is separate: it reports UVLO and overtemperature conditions and is not asserted by RST alone. The specified DIAG reset pulse width is 240ns min., 500ns typ. and 800ns max.; use at least 800ns to cover the specified range. The RST-to-output turn-off delay is 55…95ns, typically 75ns. The datasheet does not specify a separate DIAG release delay after reset.

Does it answer your questions?

Regards
/Peter