Should a inductor be added between Cin and the drain of MOS in the applicaion of Liner Voltage Regulator in L9779

[Haigy Bob]

 I've got a problem about the engine management IC——L9779. I would really appreciate that if you could help.

Here is the thing：

  A Liner Voltage Regulator has been built on this chip, which could transit the voltage from 12V to 5V and 3.3V.

And this Regulator could work with dedicated external device. The typical application circuit are shown in the datasheet,

and I've shot it to the figure 1.

Figure 1 :typecal application circuit of L9779 voltage regulator.

And there is a PCB design note which limited the PCB design rules, which is shown in figure 2.

Figure 2: PCB design rules for L9779 voltage regulator.

  Based on this design limitation, the inductance between Cin and drain of MOS should be less than 10nH.

But here is the problem. I've refenced a application circuit from ST official website.(and I will attach it to this email)

This circuit is shown in figure3

 Figure 3: A application circuit fron ST official website.

    In this circuit a inductor is added between Cin and drain of MOS. I am confused about this design which is totally oppsite from the datasheet.

I want know whether this was a wrong application or not.

[FPIRO]

​Hello,

the statement of DS is correct and the circuit you are referring is in the imput side of VB. The C2-L1-C3 structure is a pi-greek filtering structure on the VB and is not related with the VDD5 loop. The DS statement means that the VDD5 regulation loop should be shrinked enough to avoid parasitic inductance in the reulation loop and L1 is not in this loop.

Please pay attention that the 3.3V is not a regualtor that should be used for any load. It is just an internal regualtor used to power the internal structure and cannot be used as an external regualtor.

Best regards

[Haigy Bob]

First reply! Really thank you.​

As you mentioned, the Pi-greek filtering module is not related with VDD5 loop. So there is not Cin in this circuit. Should the drain of MOS be closed to the C3，the right side capcitor of filtering ?

[Haigy Bob]

First reply! Really thank you.​

As you mentioned, the Pi-greek filtering module is not related with VDD5 loop. So there is not Cin in this circuit. Should the drain of MOS be closed to the C3，the right side capcitor of filtering ?

[FPIRO]

​Hello, Cin in this implementation is C15 that should be put closed to the pin.

[Ahmad M.Nejad]

In the application circuit, 3.3u inductor is placed between VB and drian of MOS, not C3(Cin) and drian of MOS.