PowerSTEP01 SW voltage level questions

[MGuru.1]

Hello,

I am using the powerSTEP01 chip with VDD = 3.3V and VREG = 3.3V. I would like to know if I can directly drive the "SW" (switch) input pin with a 5 Volt logic level signal. Will the pin be damaged if I drive it with a 5 Volt active level? Please advise. Thanks.

Mohan

[Cristiana SCARAMEL]

Hello @MGuru.1​ welcome to the ST Community.

The SW pin is internally pulled up to VDD voltage, so the signal applied to the pin must be compatible with the logic supply voltage.

In you case with VDD = 3.3 V the high voltage level of SW pin must be 3.3 V.

If you want to apply a 5 V signal you can change the VDD voltage level (pay attention that the VDD pin voltage imposes logical output voltage range of SDO pin).

Let me know if I helped you.

[MGuru.1]

Hi Cristiana, thank you. This makes sense. However the datasheet says "ABS MAX" voltage for Vsw is +5.5V. it does not say "ABS MAX" = "VDD". So, is it safe to drive SW to 5.0V, when VDD = 3.3V ?

I hope my question makes sense. Please let me know. Thank you.

[Cristiana SCARAMEL]

Hi @MGuru.1​ ,

I confirm that the "ABS MAX" voltage for SW pin is +5.5V.

If you apply 5V to the SW pin with VDD = 3.3V the device is not damaged.

Anyway this operation mode is not recommended because there is a sinked current into VDD pin through the SW pullup resistor ('Vsw-VDD'/RPUSW).

Depending on your external connection on VDD you could have undesired effects (e.g. if you use the same supply for VDD and VREG, also the VREG voltage will be affected by the sink current).

[MGuru.1]

Hi Cristina,

Thank you so much, this is very helpful. In my case, if I apply 5.0V the sink current will only be (5-3.3)/80kohms = 21 microamps. I don't think this small current will cause any problems to my 3.3V supply.

Thank you for the advice.

Regards,

Mohan

[Cristiana SCARAMEL]

Hi @MGuru.1​ you're welcome!

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