LDL1117S50R exhibiting unstable oscillations

[A_MacDonald]

I am using an LDL1117S50R fixed voltage, 5 V regulator. I am regulating down from +12V to +5V. Our +12V supply is clean.

It’s a pretty simple circuit; one 1 uF capacitor at the input, and one 100 nF, one 1 uF, and one 4.7 uF capacitor at the output. I don’t need an enormous load; 500 mA is sufficient.

It was working great at first, but once I reach a load of about 200 mA, it began oscillating unstably at about 2.2. kHz. See the screenshot below. I was using a Rigol electronic load to test this.

 

This problem also appears to be intermittent. See the screenshots below. It’s fine, and then unstable, and then fine again, and unstable. The period of instability is not consistent.

 

My PCB is good. The input and output caps are close to the pins and I’ve used low ESR ceramic capacitors.

Does anyone have any idea what this may be?

[Peter BENSCH]

Welcome ​@A_MacDonald, to the community!

The oscillation is very likely caused by loop stability and layout, not by the load current itself. The key issue is that the input capacitor is connected through a very narrow track, additionally from the 12V point of view “behind” the input pin, which adds inductance and weakens the regulator’s transient response. Also, the output capacitor network may not match the ESR/capacitance conditions required for this LDO.

Try:

• Place the input capacitor directly at VIN and GND with very short, wide traces
• Test with one recommended output capacitor only
• If the ESR of the individual output capacitor is significantly less than 100mΩ, you can also add a physical ESR in series in the range of around 100mΩ to 1Ω (see datasheet, fig. 20)
• Verify stability with a simple resistive load, not just your or an electronic load

Hope that helps?

Regards
/Peter

[A_MacDonald]

I figured that it had to be layout. There’s only so much that can go wrong with a linear regulator otherwise. The top plane is +12V, so I got rid of traces on the inner planes.

We are using Samsung’s CL series ceramic capacitors, so ESR shouldn’t be an issue.