How to integrate the STM MC Libarary into an RTOS

[luke23]

Posted on March 11, 2014 at 06:45

Hi

We are using uC/OS II RTOS.  How do I modify the MC Application project to call the relevant BSP_IntVectSet() (handler setup)?

Where is the best place to do this?

(I am taking care not to double-up any application IRQs with the MC IRQs which I am treating as reserved. I presume the MC library uses IRQ's but I can't seem to find a central location where they're all nicely marshalled.)

Is this the only setup I need to perform, apart from tasking the 3 MC tasks?

Thanks

#uc/os-isr-critical-section #micrium-uc-uc/os-integration

[Gigi]

Posted on March 11, 2014 at 09:28

Ciao Luke

In the package you can find the Free RTOS integration example to take inspiration.

Also in the UM some paragraph shall cover the issue of integration of the MC lib with and user project taking care of IRQ priority and so on.

Never used the uC/OS but I think that the same approach used for free RTOS can be used, that is to keep the highfrequency task basically called by the ADC IRQ out of the scope of the OS and manage just the Medium/Low and Safety task with the OS.

To do thsi the IRQ required by the free RTOS have been Systick, pendSV and SVC that as you can see in the stm32fxxx_it.c is not more managed by our Timebase in case of free RTOS project.

All relevant IRQ used is grouped in two files: stm32fxxx_it.c and stm32fxxx_MC_it.c.

Ciao

Gigi

[luke23]

Posted on March 25, 2014 at 12:51

Thanks for that.

Do any of the following routines require to be run with interrupts disabled (or in a critical section)?

See especially the TSK_LowFrequencyTask() which is run from the high priority ISR handler PendSV_Handler() - special reason, or just convenience of SWI?

- TSK_LowFrequencyTask()

- TSK_MediumFrequencyTask()

- TSK_HighFrequencyTask()

- TSK_SafetyTask()

Are there any (other) special conditions for running these functions?

I'm not sure about FreeRTOS, but it seems as though the ISR handlers run directly from the vector table and that flags are cleared by the handler.  In my RTOS (uC/OS-II) the interrupts are redirected from OS wrappers which handle clearing of the flags.  Any implications for me here, apart from telling the OS about the MC ISRs?

Thanks

Luke

[luke23]

Posted on March 27, 2014 at 20:11

I have found the information in the manual.

UM1052 ''User Manual STM32Fx PMSM single/dual FOC SDK v3.4'', pages 96-98 has the pre-emption priorities for each of the MC tasks.

[Gigi]

Posted on March 31, 2014 at 10:18

Well done, Luke

Ciao

Gigi