With multiple SPI slaves, why do we need multiple SS ?

[Vivek76]

why more than one STM32 SPI Slave connect to master means More SS need ?

[mƎALLEm]

Hello,

Nothing to do with STM32 itself. 

The SPI lines data and clock are common to all slaves. How the master could address the communication to a specific slave if there is nothing to indicate which slave to communicate with?  SS: Slave Select. that corresponds to SPI_NSS signal in STM32 which means Negative Slave Select).

https://en.wikipedia.org/wiki/Serial_Peripheral_Interface

[Andrew Neil]

As @mƎALLEm said, this is standard to the way SPI works - nothing specific to STM32.

The specific part of the Wikipedia article which describes this is:

https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Multidrop_configuration

 

See also:

https://learn.sparkfun.com/tutorials/serial-peripheral-interface-spi/chip-select-cs

https://www.analog.com/en/resources/analog-dialogue/articles/introduction-to-spi-interface.html#:~:text=the%20falling%20edge.-,Multi%2DSubnode%20Configuration,-Multiple%20subnodes%20can

 

[Ozone]

As suggested, read a good tutorial about the basics of the SPI bus.
In it's duplex incarnation, SPI clocks out data via the MOSI line, and at the same time clocks in data from slaves via the MISO line.
You cannot have more than one slave connected at a time that disagree on the bus state.
In the best case, the result is chaos and incorrect data.

Only if you have an unidirectional connection (writing to slaves, MOSI only), you could drive several devices with one NSS signal.