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adib
Associate III
March 15, 2004
Question

Timer Problem

  • March 15, 2004
  • 3 replies
  • 683 views
Posted on March 15, 2004 at 10:51

Timer Problem

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3 replies

adib
adibAuthor
Associate III
March 11, 2004
Posted on March 11, 2004 at 09:34

I'm working with the ST72264G u-C.

I'm using Timer A in ''one pulse mode'', and I want to use Timer B as ''output compare'' to indicate when a period of time has elapsed without output pin. (just to get interrupt when a period has elapsed).

In my application I want Timer B to be stopped until I enable it wait for the output compare interrupt and disable it back.

Since Timer B is free running, when I enable the interrupts using ''rim'' I get a timer B interrupt although I already set the TIMD bit in the CSR (and preformed a read from the CSR/OCBLR to clear the OCF bit).

Can anyone advise how the get rid from the first unwanted interrupt?

jatin
Visitor II
March 15, 2004
Posted on March 15, 2004 at 08:56

It is not the normal behaviour. Could you attach your code ?

adib
adibAuthor
Associate III
March 15, 2004
Posted on March 15, 2004 at 10:51

I suspected that I worked with a faulty chip.

I replaced it and everything is working.

Thanks