TDA7391PD configuration of C3 and R2 (Mute and Sync pins)

[ManuelGomez_Opt]

Hi there,

We are aiming to use the E-TDA7391PDTR in our new design and we would like someone from ST to share the relationship between C3, R2 and the Mute/sync pins, as the older related question does not explain much and does not resolve the issue in case we want to change the values. The datasheet does not have any explanatory section on the working principles of the chip, so no relevant info is found there.

For reference:

 

Many thanks in advance.

Best regards,

Manuel Gomez Galan

[AScha.3]

Hi,

C3 is the delay setting cap , R2  sets the charge current for the cap. So C + R →   delay-time for mute/stdby.

Just use the recommended 56k + 33uF , to get the intended “normal” behaviour.

 

btw

Why you want use single channel chip ? Why not the more usual 2 or 4 channel types, like :

TDA75610S  , 4 x 45 W differential power amplifier with full I2C diagnostics, high efficiency .

mouser : 511-TDA75610S-48X , smd : 511-TDA75610S-ZST