Sw delay

[sr_shinde]

Posted on September 23, 2008 at 02:47

Sw delay

[sr_shinde]

Posted on May 17, 2011 at 09:55

Thanks Matt

What about S/w delay.

Regards

Sai

[matthew239955_stm1]

Posted on May 17, 2011 at 09:55

The timer reset behavior is not intuitive. See this post for details:

http://www.st.com/mcu/forums-cat-7126-21.html

Matt

[sr_shinde]

Posted on May 17, 2011 at 09:55

Hi all ,

For S/W delay i just wrote For loop of Multiple of (96000 * 10000)

But It gives delay in just microseconds.I am using Ride Simulator.

PLL is 96Mhz.

Also if anybody has Timer Interrupt Configured for 1ms please send me.

Because i am not getting exact delay observed on CRO.

Please Reply

Regards

Sai

[daniel8]

Posted on May 17, 2011 at 09:55

Define your variables in your delay loop as volatile - that way the compiler wont optimize them out. If you are getting 1us times, then most likely that is whats happening.

[sr_shinde]

Posted on May 17, 2011 at 09:55

Hi all,

By s/w delay I mean to say simple for loop.

Clock configuration done is as follows:

/*wait state insertion: This function should be executed from

SRAM when*/

/*booting from bank1 to avoid Read-While-Write from the same Bank.*/

FMI_Config (FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0,FMI_PWD_ENABLE,

FMI_LVD_ENABLE, FMI_FREQ_HIGH);/*Insert 2 Wait States for

read*/

SCU_PLLFactorsConfig (192, 25, 2); /* PLL factors Configuration based

on*/ /* a OSC/Crystal value = 25 MHz*/

SCU_PLLCmd (ENABLE); /* PLL Enable and wait for Locking*/

SCU_RCLKDivisorConfig (SCU_RCLK_Div1); /* RCLK @96Mhz */

SCU_HCLKDivisorConfig (SCU_HCLK_Div1); /* AHB @96Mhz */

SCU_FMICLKDivisorConfig (SCU_FMICLK_Div1);/* FMI @96Mhz */

SCU_PCLKDivisorConfig (SCU_PCLK_Div2); /* APB @48Mhz */

SCU_MCLKSourceConfig (SCU_MCLK_PLL); /* MCLK @96Mhz */

Delay Function:

// ms delay

void Delay(unsigned int uint_TimeDelay)

{

unsigned int l_uintdelay1, l_uintdelay2;

for (l_uintdelay2 = 0; l_uintdelay2 < uint_TimeDelay; l_uintdelay2++)

{

//approx: 96000 instruction execution time (at 96 MHz MCLK) = 1ms

minimum

for (l_uintdelay1 = 0;l_uintdelay1

for (l_uintdelay1 = 0;l_uintdelay1

}

}

Delay used in application:

while(1)

{

GPIO_WriteBit(GPIO9,GPIO_Pin_3,Bit_RESET);

Delay(1);

GPIO_WriteBit(GPIO9,GPIO_Pin_3,Bit_SET);

Delay(1);

}

Expected Waveform (GPIO9.3):

OFF time: 1 ms min

ON time: 1 ms min

Waveform observed on Oscilloscope (GPIO9.3):

OFF time: 1 us

ON time: 1.36 us

I am using RIDE7 debugger.Crystal used is of 25MHz.So delay should be more than the expected but how it can be less than the expected?

Regards

Sai

[matthew239955_stm1]

Posted on May 17, 2011 at 09:55

Sorry, I'm confused about your question.

When you say S/W delay, do you mean a simple loop or do you mean configuring the timer to interrupt at a given delay?

If you mean a loop, what exactly is your question?

And if you mean a timer interrupt, please post your code, expected behavior, and observed behavior so the forum can have a better idea what your problem is.

Matt

[dhoyen]

Posted on May 17, 2011 at 09:55

Hi,

I had this problem :

How to realise a delay..

and in fact, he doesn't work with a simple ''for'' loop :

Compiler optimization, i think detect your ''for'' loop empty,

and jump directly to the following line of code (TBC).

 

Can i suggest you to add this line just in your loop for :

 

and will solve (i think) your problem

 

 

should be :

 

 

for (i=0;i

 

{

 

asm volatile ( ''NOP'' );

 

}

 

But keep in mind, it's a lot of CPU cycle lost here... A timer is really better especialy for a long periode like 1msec

Regards

Damien

[ This message was edited by: dhoyen on 12-09-2008 10:32 ]

[ This message was edited by: dhoyen on 12-09-2008 10:34 ]

[sr_shinde]

Posted on May 17, 2011 at 09:55

Thanks for Reply

Now I am using timer for delay.

But i will definitly use for loop with ''nop'' for small time delay

Regards

Sai