STWD100NPWY3F Watchdog timer issues.

[Malar]

I'm using a STWD100NPWY3F watchdog timer, and I can't get it working according to the datasheet. I have the following connections:

VCC: 3.3V

GND: GND

EN: GND

WDO: 10K pull up to VCC

WDI: pull down to GND and toggled to VCC

 

WDO stays low and keeps the MCU in a reset state. If I pull EN high, WDO goes high and the MCU operates. With EN low, even at startup, the WDO remains low. I have tried toggling WDI high and low, but WDO never changes state unless I pull EN high (which disables it).

[Peter BENSCH]

Welcome ​@Malar, to the community!

The STWD100NPx is a watchdog with open drain output and tWD=3.4ms.

• How did you measure the level at WDO?
• What kind of MCU is connected to WDO, or what are the parameters of its reset pin (bi-/unidirectional, internal pulls or current sources, etc.)?
• What does the signal at WDI look like, with which you want to trigger the watchdog?

If /EN is pulled low and WDI is held statically low, WDO must switch every 3.4ms, i.e. at a frequency of about 147Hz (see datasheet, the last sentence in section 3.1). If WDO remains low in this case, there is definitely an issue. Please check this with additional samples and with an oscilloscope.

Regards
/Peter

[Malar]

Hi,

Please find below our responses to your questions regarding the STWD100NPx watchdog behavior.

1. How did you measure the level at WDO?

We measured the WDO signal using both a multimeter and a logic analyzer.

• With the multimeter, the WDO voltage was measured at approximately 1.66 V, which we observed as the LOW state.
• However, when monitoring the WDO signal using the logic analyzer, the waveform remained continuously HIGH and we did not observe the expected 3.4 ms switching behavior.

We will also verify this behavior using an oscilloscope and additional watchdog samples.

2. What kind of MCU is connected to WDO, and what are the reset-pin parameters?

The WDO output is connected to the STM32WB55CG MCU reset pin.

The reset pin is bidirectional. According to the STM32WB55CG datasheet, the internal reset-pin resistance is specified as:

• 30 kΩ minimum
• 40 kΩ typical
• 50 kΩ maximum

In addition to the MCU's internal resistance, we have externally connected a 10 kΩ pull-up resistor between WDO and the RESET pin.

Therefore, the WDO output is connected directly to the STM32WB55CG reset input with an external 10 kΩ pull-up.

3. What does the WDI signal look like, and what signal are we using to trigger the watchdog?

The watchdog is controlled by GPIO PA1 of the STM32WB55CG.

Our intended watchdog sequence is:

1. GPIO PA1 toggles continuously.
2. The GPIO timing is 1 ms ON + 1 ms OFF, giving a complete period of approximately 2 ms.
3. This toggling continues for 1 minute to continuously service the watchdog.
4. After the 1-minute watchdog sequence, the controller input GPIO is set HIGH for 5 ms.
5. After this sequence, the program returns to the beginning of the loop and repeats.
   
   Therefore, during normal operation, WDI receives a continuous square-wave signal from PA1. When the watchdog servicing is stopped, we expect the STWD100NPx to assert WDO after the specified watchdog timeout.

   Based on the datasheet, with /EN pulled LOW and WDI held statically LOW, we understand that WDO should toggle approximately every 3.4 ms (about 147 Hz). Since our logic analyzer currently shows WDO continuously HIGH, we suspect there may be an issue that needs further investigation.

[Peter BENSCH]

First, a note in advance: the STM32WB55, like all STM32s, contains two watchdogs, namely an IWDG (Independent Watchdog) and a WWDG (Windowed Watchdog). The IWDG has a clock independent of the CPU main clocks, which means it can also be used for safety-critical applications and would reduce BOM costs, because normally no external watchdog is needed.

As for the connection to the STM32WB55CG, that is still not entirely clear to me. You wrote: “a 10 kΩ pull-up resistor between WDO and the RESET pin”, what I do not understand as a pull-up, but rather as a series resistor?

You also say that you measure 1.66V at WDO with a multimeter (typically an integrating one), which is quite precisely the mean value of a square-wave voltage with a peak value of 3.3V. If that was previously a typo and WDO is connected directly to /NRST, from which a 10 kΩ pull-up goes to VDD, you should please check the signal at WDO with an oscilloscope.

Regards
/Peter

[Andrew Neil]

I have the following connections:

As ​@Peter BENSCH suggests, it would be far more useful to provide a schematic - it is a far better way to accurately & unambiguously communicate electronic circuit details!