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June 10, 2026
Question

Reduced wireless charging efficiency when transition STWLC38 from chip revision 0x3 to 0x4

  • June 10, 2026
  • 1 reply
  • 19 views

Hello, I noticed Reduced wireless charging efficiency when transitioning STWLC38 from chip revision 0x3 to 0x4. I am seeing an e2e efficiency difference of 5% at full load (5.55V, 400mA) when using the same BOM as the chip revision 0x3 and am confused about what changes may be contributing to this behavior. I need this information to determine if I need to repeat involved FOD calibration on my design. I noticed that chip revision 0x4 requires a different patch and config. I have included my old and new config below:

Revision 3 Config - Biggie_Smalls_Rx_UV1_Rev1_6-26-25_5v5out.memh

Revision 3 Patch - (I was not using any NVM Patch)

Revision 4 Config - Biggie_Smalls_Rx_UV1_Rev1_6-9-26_5v5out__Config_1077_cut1.3_3.memh

Revision 4 Patch - STWLC38JRM_Patch_1656_rtx.memh

Zip file with memh files because the .memh was blocked (attached)

Please let me know if there are any changes or measurements that could help understand the issue. I am using BPP at 5.55Vout and am using a custom transmitter design. 

1 reply

Didier HERROUIN
ST Technical Moderator
June 11, 2026

Dear Camking419,

There is no change from revision 03 to 04 which could impact the power transfer efficiency. Only the HW over-voltage protection has been improved on rev04. 

By the way, even on rev03, there should be a patch. Note that patch 1656 is compliant with both revisions, so you can use this patch for all your boards (it will ensure that the difference you observe is not due to the patch version).

For configuration, I have attached the latest configurations for rev03 (cut1.2) and for rev04 (cut1.3).

Regarding your configuration, I noticed something strange : all LDO parameters are set to 0. It means that whatever the current is, Vout=Vrect with no voltage drop. It can be seen using the “Charts” menu of the GUI.
For charging stability, we recommend a higher drop voltage for small currents (typically 320mV for current >560mA) and keeping a small margin (for efficiency reason) of about 128mV for higher currents. Without this margin, a sudden current peak demand could generate a Vout voltage drop due to regulation loop latency.

You can use the parameters from the configuration files attached as a reference.

Best regards,

 

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