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steve239955_stm1_stmicro_com
steve239955_stm1_stmicro_comAuthor
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December 12, 2006
Posted on December 12, 2006 at 15:49

I am using an ST10F276 and I find that the ADBSY bit is always set after startup, long after the 40.629 clock pulses have passed for ADC initialisation. I do not configure the ADC so all registers contain their reset values. I have a 2.5V reference connected to the VAREF pin and a 22uF capacitor between VAREF and VAGND.

Can anyone help?

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