STM8S208CBT6 (LQFP48) — Issues using PD0 and PC7 as standard digital inputs (GPIO Input Pull-up)
Hello everyone,
I am working on a custom locker controller board based on the STM8S208CBT6 in the LQFP48 package. I am using the Cosmic C Compiler inside the STVD environment and flashing the MCU via STVP with a standard ST-Link V2 clone.
I am experiencing an issue where two specific pins, PD0 (Pin 41) and PC7 (Pin 34), are stuck at a constant logic high level ('1') when configured as standard digital inputs with internal pull-ups (GPIO_MODE_IN_PU_NO_IT), completely ignoring external buttons / shorts to GND. At the same time, six other GPIO pins configured exactly the same way work perfectly fine and detect shorts to GND without any issues.
Here is the hardware configuration and what I have observed so far:
1. PD0 (Pin 41) is multiplexed with TIM3_CH2, TIM1_BKIN, and CLK_CCO. On this 48-pin package, it is also right next to the SWIM pin (Pin 40).
2. PC7 (Pin 34) is multiplexed with SPI_MISO.
3. The board relies on standard UART1 (TX on PA5, RX on PA4) for RS-485 communication, which must remain active during operation.
What I have tried to resolve the issue:
* I explicitly disabled the peripheral modules in code by clearing their control registers (SPI->CR1 = 0x00; and TIM3->CR1 = 0x00;).
* I ensured that CLK->PCKENR1 and CLK->PCKENR2 are set to 0xFF so that peripheral clocks are enabled, preventing bus access faults in Cosmic.
* I tried disabling SWIM globally by setting CFG->GCR |= (1 << 0); (SWIM_DISABLE), but this completely freezes the peripheral clock bus on this LQFP48 package, which kills the UART1 module and stops all RS-485 communication.
* Hardware test: If I manually solder an external strong pull-up resistor (4.7k to 10k) to 5V on these pins, they finally start reading the logic state correctly and register shorts to GND in the IDR register. Without the external resistors, they float or stay stuck at '1'.
It seems like the internal pull-up structures for PD0 (due to SWIM multiplexing architecture in LQFP48) and PC7 (due to SPI MISO true open-drain/floating default behavior) are either not being implemented or are heavily overriden by the alternative function logic when the MCU boots.
My questions:
1. Is there a reliable way to completely release PD0 and PC7 from their default alternative/debug functions to use them as clean GPIO inputs without using external hardware pull-up resistors?
2. How can I safely override this behavior in Cosmic C / STVD? Are there specific Option Bytes (AFR configuration) that I must program via STVP to fix this hardware routing conflict for the 48-pin package?
Thank you in advance for your help and insights!
