LIS2DW12 INT2 external trigger minimum pulse width in single data conversion

[saito_d]

Hello ST Community,

We are using LIS2DW12 in single data conversion on-demand mode.

Configuration:

- MODE[1:0] = 10, single data conversion on-demand mode
- SLP_MODE_SEL = 0, output data generation triggered by INT2 external signal
- INT2 is used for Data update trigger
- INT2 is driven by an MCU GPIO

According to the LIS2DW12 datasheet, INT2 is described as a clock input when selected in single data conversion on-demand mode, and INT2 clock input supports up to 200 Hz.
However, we could not find the AC timing specification for the INT2 input trigger.

Could you please clarify the following points?

1. What is the minimum HIGH pulse width required on INT2 to guarantee a trigger?
2. What is the minimum LOW pulse width required before the next trigger?
3. Is the trigger detected on the rising edge, falling edge, or by the HIGH level?
4. Is it required to keep INT2 HIGH until DRDY is asserted, or is a one-shot pulse acceptable?
5. Are these timing values guaranteed over process, voltage, and temperature?

We need this information for production design margin.

Best regards,
Daisuke Saito

[saito_d]

I found the answer in AN5038, Rev. 6, Section 3.3 “Single data conversion (on-demand mode)”.

According to the application note, when single data conversion on-demand mode is used with SLP_MODE_SEL = 0 in CTRL3, the trigger is:

“A rising edge on the INT2 pin”

The same section also states that:

“The minimum duration of trigger signal high level is 20 ns.”

So the INT2 external trigger is rising-edge triggered, not level triggered, and the minimum high-level duration of the trigger signal is 20 ns.

This resolves my question. Thank you.