Skip to main content
Associate
August 11, 2026
Question

How to let LSM6DSOX enter I3C mode

Product https://www.st.com/en/mems-and-sensors/lsm6dsox.html

About the below datasheet description, I want to confirm exact I2C Fast mode Plus timing. Should this SETDASA/ENTDAA follow all timing parameters as I2C Fm+? For NXP I3C, it’s not hard to set a suitable baud rate for this, but it’s impossible to meet all timing for a ENTDAA operation. Can ST I3C IP run ENTDAA with I2C timing to meet your sensor product?
 

 

4 replies

Federica Bossi
ST Technical Moderator
August 13, 2026

Hi ​@Abner ,

Yes, for LSM6DSOX, the address assignment (DAA or ENTDAA) must be performed with I²C Fast Mode Plus timing. Once the slave is addressed, the I²C slave is disabled and the timing becomes compatible with I3C specifications

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question.
AbnerAuthor
Associate
August 21, 2026

Hi Federica,

OK. So design expectation is the bus controller needs to operate I²C Fast Mode Plus timing to finish ENTDAA.
But ENTDAA itself is a kind of I3C operation. How to make I3C operation timing to meet I²C Fast Mode Plus timing.
Is ST I3C IP can do this? How to let other vendor to use your sensor without this timing feature? I doubt this I²C Fast Mode Plus timing is just baud rate speed instead of full timing parameters such as tSU:STO。

AbnerAuthor
Associate
September 10, 2026

​@Federica Bossi Any update of this? The details is not clear in datasheet. We can only guess the mechanism but not confirm.

Federica Bossi
ST Technical Moderator
September 14, 2026

Hi ​@Abner ,

When I²C/I3C coexistence is used, the address assignment phase (ENTDAA or SETDASA) must be performed with I²C Fast Mode Plus timing.

This requirement is not limited to SCL frequency only: the datasheet also specifies the I²C Fast Mode Plus timing parameters, including SCL low/high times and START/STOP-related timing limits.

After the dynamic address is assigned, the I²C slave is disabled and the interface timing becomes compatible with I3C operation.

So, from the sensor side, there is no alternative mechanism to relax ENTDAA timing: the bus controller must be able to meet the Fast Mode Plus requirements during the address-assignment phase. If this cannot be guaranteed, the practical solution is to use only the I3C mode with the proper power-up configuration, or a static-address-based setup where applicable.

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question.