FXLS8967AF - What happens on Soft Reset ?

[Andrew Neil]

Figure 14 - Operating modes transition diagram - does not show it:

 

and neither does Table 16 - Operating modes transition criteria:

 

The description of the “reset mechanism” doesn’t really relate to the above state diagram or table:

 

[AmitPurohit]

On the FXLS8967AF, a soft reset is typically initiated by setting the RST bit in the SENS Config register.

When we perform “soft reset” by setting RST bit then:

• Boot mode mechanism restarts. The internal boot sequence is re‑triggered.  All functional blocks are reset, and the internal registers are reloaded with their default values.
• The register contents are cleared. Configuration registers return to their power‑on defaults. Any previously written register settings are lost.
• Unlike a POR a soft reset does not remove power from VDD. It’s a “digital core restart” rather than a full hardware power‑on reset.
• Comm Interfaces are temporarily unavailable:  During the boot period, I²C and SPI interfaces are temporarily not available. The host must wait TBOOT1 (or TBOOT2) after issuing the reset before attempting communication.

Read more details on Boot Mode (for normal vs motion detect mode of operation below):

 

[Andrew Neil]

Thanks.

So where does this come in the mode transitions diagram?

That’s the question.

[AmitPurohit]

Thanks for your follow up question. Please see response below, in the mode transition diagram this come in the shown below in the updated snapshot.

 

Hope this helps.