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Associate
June 12, 2026
Question

S2LP LDC-Mode

  • June 12, 2026
  • 0 replies
  • 3 views

Hello ST-Team.

How can I configure the receiver’s LDC mode so that the LDC timer runs for 4 seconds and then reliably receives a data packet? I want to configure GPIO3 as the RX_DATA_READY interrupt so that the microcontroller wakes up, processes the data, sends an acknowledgment, and then returns to LDC mode.

How must the timing be configured on the transmitter side? It would have to send many data packets so that the receiver catches one of them inside the RX window. And when is the acknowledgment allowed to be sent?

The goal is to achieve ultra‑low power consumption on the receiver side. Do you have a solution for this?