VD5943 – MIPI CSI-2 Clock Mode (Continuous vs Non-Continuous)

[Arcel]

Hello,

I am integrating the VD5943 image sensor with a Lattice FPGA acting as a MIPI CSI-2 receiver.

I have reviewed both the VD5943 Datasheet (DS14968) and the Reference Manual (RM0532), but I could not find any information about the operating mode of the MIPI CSI-2 clock lane.

Could someone from ST please clarify the following?

• Does the VD5943 transmit the MIPI CSI-2 clock in Continuous Clock mode or Non-Continuous Clock mode?
• If this behavior is configurable, which register controls it?
• If it is fixed, which mode is implemented by default?

This information is important to ensure compatibility with our FPGA CSI-2 receiver and downstream processing.

Thank you for your support.

[AdrienBonnat]

Hello,

The VD5943 is using continuous clock by default. The mode can be selected through bit 4 of debug register DPHYTX_CTRL at address 0x108c, please refer to table 14 of register manual.

Best regards

Adrien