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October 15, 2026
Question

Drive CCD Sensor : TCD1304DG

Hi ST Community,

 

I discovered nucleo board 2 weeks ago because I want build spectrometer using a Toshiba TCD1304DG CCD sensor.

I’m reaching out because I need your help understanding how to drive this ccd sensor.

 

I’ve read datasheet and projects on internet to get a general understanding of how to operate this sensor. However, there are a few points I’m still unsure about. Could you please help me clarify the following questions?

 

Here is the datasheet : https://toshiba.semicon-storage.com/info/TCD1304DG_Web_Datasheet_en_20260520.pdf?did=13709&prodName=TCD1304DG

 

1. Is my understanding of the acquisition sequence correct?

My understanding is that, to read all 3,694 pixels using a hardware timer, the ADC, and DMA, the acquisition sequence should be as follows:

 

  • Set ICG LOW.
  • After 500 ns, set SH HIGH.
  • After 5,000 ns, set SH LOW.
  • After another 5,000 ns, set ICG HIGH.
  • Read all 3,694 pixels from the OS pin. The master clock (M) runs continuously, shifting the pixel values out sequentially, while the ADC samples the OS signal at the appropriate times. (that step take few milliseconds)
  • Send data
  • Repeat the sequence to acquire the next CCD line.

This is my interpretation of the datasheet. However, there is something I miss because :

I’m using an STM32 Nucleo-G474RE board and a circuit assembled on a breadboard. With my current setup, I can see the ADC readings change as the ambient light level changes. However, I cannot obtain meaningful pixel-by-pixel measurements :

For example, if I cover part of the CCD, I would expect the corresponding pixels to show different ADC values. Instead, I don’t see the expected variation across the pixel array.

This makes me think that I’m missing something. To determine if I have to work on hardware or software, I prefer check by you I we understand datasheet the same way.

 

2. Synchronizing the ADC with the master clock (M)

My understanding is that the pixel values are output sequentially on the OS pin. To measure each pixel, the ADC must be synchronized with the master clock (M).

However, in some projects I found online, one pulse of the master clock (M) seems to push one pixel to pin OS, whereas in other projects, one pixel is pushed to pin OS every four clock pulses.

I’m therefore unsure whether I should trigger the ADC once per M clock pulse or once every four M clock pulses to correctly measure each pixel.

Could someone clarify how this works?

 

I don’t want to overload this post with too much information, but I’d be happy to share my code and circuit diagram if that would help.

 

Thank you for your assistance.

Martin

 

 

2 replies

Andrew Neil
Super User
October 15, 2026

It’s a Toshiba product, so you need to go to Toshiba for support with their product - it’s nothing to do with ST!

There are Technical inquiry links on Toshiba’s Product Page:

https://toshiba.semicon-storage.com/eu/semiconductor/product/linear-image-sensors/detail.TCD1304DG.html#:~:text=Oct%2C2026-,Technical%20inquiry,-Contact%20us

Also: https://toshiba.semicon-storage.com/eu/contact.html

 

Also see the ‘Design & Develpopment’ link at the top of the page - for Reference Designs, Evaluation Boards, Application Notes, etc ...

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.
michaeltang
ST Technical Moderator
October 15, 2026

Hello Martin,

Thank you for your interest in ST products and welcome to the ST Community.

For your case, I believe it’s more about how to:

  1. Sync ADC acquisition with a MCLK
  2. The MCLK is driven by a STM32 Timer output
  3. The ADC conversion result should be copied to memory by DMA, in the meantime, you may need a ping-pong buffer patter
  4. The ADC sampling timing (VSAMPLING) should be able to adjust within a MCLK cycle

So, you need to chain at least 2 Timers together, one for MCLK, the other for VSAMP and trigger the ADC acquisition. Maybe you need extra one for sending a frame sync (SH/ICG).

For this complex usage it’s feasible with STM32. If you need additional help, we may transfer this post to STM32 forum. Thanks

Best regards,

Michael 

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