Posted on October 11, 2017 at 15:12Sorry , i was on a bad revision of the reference manual not the last one (Revision 6 RM0349)
Table 12 was not correct on rev 3.
after checking with expert.
here is the answer.
'The problem is not related to wrong address of the supervisor ADC (
SAR_ADC_12BIT_B0
), but It is related to clock gating.
Every time a driver is start (xxx_lld_start) the correct PTCL register is written in order to gate the clock to the peripherals. When using a driver not included in spc5studio
The first operation to do before accessing register is to gate the clock using the function, otherwise IVOR1 is generated.
SPCSetPeripheralClockMode(PCTL NUMBER, (SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2)));
In this case the PCTL NUMBER for
SAR_ADC_12BIT_B0
is 112 (table 658 in the RM).'
Best regards
Erwan
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