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Patriks
Senior
Feb 3, 2015 3:11 PM UTC
Solved

Continous data transfer to GPIO with DMA SPC56EL

Posted on February 03, 2015 at 16:11

Hello,

I would like to use DMA to control the states of some GPIOs. The software should write the entries of an array to the PGPDO[0]register. For that case, I wrote a small demo program. The outputArray isuint16_t and contains 256 elements.Each element stands for a state of 8 GPIO pins. The software should write these elements circular to the PGPDO[0] register, but it doesn´t work. The configuration looks like that:

 edmaChannelStart(0); 
edmaTCDSetWord0(edmaGetTCD(0),&outputArray); 
edmaTCDSetWord1(edmaGetTCD(0),1,1,2); 
edmaTCDSetWord2(edmaGetTCD(0),512); 
edmaTCDSetWord3(edmaGetTCD(0),-512); 
edmaTCDSetWord4(edmaGetTCD(0),&SIUL.PGPDO[0].R); 
edmaTCDSetWord5Linked(edmaGetTCD(0),0,0xFF,1); 
edmaTCDSetWord6(edmaGetTCD(0),0); 
edmaTCDSetWord7Linked(edmaGetTCD(0),0,0xFF,EDMA_TCD_MODE_START); 

Can anybody tell me what I have to change in my configuration when I want the DMA transfer to run continuously as fast as possible? Best regards, Patrik
    This topic has been closed for replies.
    Patriks
    PatriksBest answer
    Senior
    Feb 5, 2015 3:06 PM UTC
    Posted on February 05, 2015 at 16:06

    Hello,

    I have found the problem. I think it was a combination of wrong channel config and DMA_MUX config. The following code gives me a continuous transfer of the array elements to the PGPDO port. The DAC2Table contains 128 16bit elemements.

    
     DMAMUX.CHCONFIG[3].R = 0x00; 
    DMAMUX.CHCONFIG[3].R = 0b10001110; 
    EDMA.DMAERQL.R = 0xFFFF; 
    edmaChannelSetup(3,&DAC2Table,&SIUL.PGPDO[0].R,2,0,1,1,2,128,-256,0,EDMA_TCD_MODE_START);
    

    I was also able to trigger the transfer of an array element using PIT and the triggered functionality. Nevertheless, I have again some problems in understanding how to use DMA with other modules. It is really hard to get detailed information out of the reference manual and I didn´t found any application notes for the SPC56EL regarding this topic. In DMA_MUX section, I saw the possibility to use the eTimer module as DMA source. Table 173 shows two sources for eTimer_0 - Channel0 and Channel1. But what does this mean? What kind of request connects the eTimer to DMA?Are they regarding to the capture and compare registers? And how do I use the eTimer in combination with DMA? What I want to do is to trigger the transfer ofan array element when theeTimer produces a compare event. The eTimer should reload the load the new compare value from the compare load register, which should then be updated by DMA. Best regards, Patrik

    1 reply

    Patriks
    PatriksAuthorBest answer
    Senior
    Feb 5, 2015 3:06 PM UTC
    Posted on February 05, 2015 at 16:06

    Hello,

    I have found the problem. I think it was a combination of wrong channel config and DMA_MUX config. The following code gives me a continuous transfer of the array elements to the PGPDO port. The DAC2Table contains 128 16bit elemements.

    
     DMAMUX.CHCONFIG[3].R = 0x00; 
    DMAMUX.CHCONFIG[3].R = 0b10001110; 
    EDMA.DMAERQL.R = 0xFFFF; 
    edmaChannelSetup(3,&DAC2Table,&SIUL.PGPDO[0].R,2,0,1,1,2,128,-256,0,EDMA_TCD_MODE_START);
    

    I was also able to trigger the transfer of an array element using PIT and the triggered functionality. Nevertheless, I have again some problems in understanding how to use DMA with other modules. It is really hard to get detailed information out of the reference manual and I didn´t found any application notes for the SPC56EL regarding this topic. In DMA_MUX section, I saw the possibility to use the eTimer module as DMA source. Table 173 shows two sources for eTimer_0 - Channel0 and Channel1. But what does this mean? What kind of request connects the eTimer to DMA?Are they regarding to the capture and compare registers? And how do I use the eTimer in combination with DMA? What I want to do is to trigger the transfer ofan array element when theeTimer produces a compare event. The eTimer should reload the load the new compare value from the compare load register, which should then be updated by DMA. Best regards, Patrik