USART BRR above 0xFFF7 hangs the Tx

[waclawek.jan]

Posted on October 03, 2017 at 13:24

.

[Nesrine M_O]

Posted on October 03, 2017 at 15:12

Hi

Waclawek.Jan

,

Could you please provide more explanation on your case, so that it will be easier to understand the issue?

-Nesrine-

[waclawek.jan]

Posted on October 03, 2017 at 23:17

Nesrine,

in an STM32F407, I enabled USART6's clock in RCC, and set USART_CR1.RE and USART_CR1.TE and USART_CR1.UE.

If I write 0xFFFF into USART_BRR, then write any byte into USART_DR, in USART_SR the TXE bit is cleared and remains so indefinitely; and there's no activity on the respective Tx pin.

If I write 0xFFF7 into USART_BRR, the byte which has been written above is output properly onto Tx pin and TXE bit is set in USART_SR.

All BRR values between 0xFFF8 and 0xFFFF appear to behave in this way.

Jan