STM32L073RZ: PA15 AF5 alternate function (TIM2_CH1) seems unavailable

[gon1332]

I've been trying to use the TIM2_CH1 function for PA15 but without success on a Nucleo-L073RZ. This function works OK on pins PA0 and PA5. Also PA15 works if set in GPIO output mode.

Errata document does not state anything about this pin.

Could you confirm?

[Uwe Bonnes]

What does fail? Can you check the registers with a debugger and compare to the datasheet/reference manual?

[gon1332]

With the debugger I can see that while PA5's Alternate function can be set to AF5, PA15's cannot (AFRL register). The below snippets shows the cases with each pin. Breakpoint 1 holds the initial state and Breakpoint 2 the initialization. Note that PA2/3 are set for USART so don't mind for these ones:

PA5
========
Breakpoint 1, main () at main.c:85
85 app_init(&app_data);
(gdb) p/x *((GPIO_TypeDef *)0x50000000U)
$1 = {MODER = 0xebfffcff, OTYPER = 0x0, OSPEEDR = 0xc000000, PUPDR = 0x24000000, IDR = 0x0, 
 ODR = 0x0, BSRR = 0x0, LCKR = 0x0, AFR = {0x0, 0x0}, BRR = 0x0}
(gdb) c
Continuing.
 
Breakpoint 2, main () at main.c:86
86 now = millis();
(gdb) p/x *((GPIO_TypeDef *)0x50000000U)
$2 = {MODER = 0xebfffbaf, OTYPER = 0x0, OSPEEDR = 0xc0008f0, PUPDR = 0x24000800, 
 IDR = 0x600c, ODR = 0x0, BSRR = 0x0, LCKR = 0x0, AFR = {0x504400, 0x0}, BRR = 0x0}
 
 
PA15
=======
Breakpoint 1, main () at main.c:85
85 app_init(&app_data);
(gdb) p/x *((GPIO_TypeDef *)0x50000000U)
$1 = {MODER = 0xebfffcff, OTYPER = 0x0, OSPEEDR = 0xc000000, PUPDR = 0x24000000, IDR = 0x0, 
 ODR = 0x0, BSRR = 0x0, LCKR = 0x0, AFR = {0x0, 0x0}, BRR = 0x0}
(gdb) c
Continuing.
 
Breakpoint 2, main () at main.c:86
86 now = millis();
(gdb) p/x *((GPIO_TypeDef *)0x50000000U)
$2 = {MODER = 0xabffffaf, OTYPER = 0x0, OSPEEDR = 0x8c0000f0, PUPDR = 0xa4000000, 
 IDR = 0xe00c, ODR = 0x0, BSRR = 0x0, LCKR = 0x0, AFR = {0x4400, 0x0}, BRR = 0x0}

The code is:

/* PA5 */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_5, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_5, LL_GPIO_PULL_DOWN); 
LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_5, LL_GPIO_SPEED_FREQ_HIGH); 
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_5, LL_GPIO_AF_5); 
 
/* PA15 */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_15, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_15, LL_GPIO_PULL_DOWN); 
LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_15, LL_GPIO_SPEED_FREQ_HIGH); 
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_15, LL_GPIO_AF_5); 

I can also verify with a logic analyzer on PA15. It is pulled down forever. On the other hand PA0 and PA5 are working perfectly.

[Tesla DeLorean]

1. LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_15, LL_GPIO_AF_5);

Pin 15 would be in the AFRH, not AFRL

[gon1332]

Oh! That was it. For some reason I connected the "_0_7" part of the name to the Alternate Functions which are also (AF_0..AF_7).