STM32F407VG: Reduce power consumption by disabling ports clock

[yonatan]

Posted on May 04, 2016 at 10:02

Hi all.

I am trying to reduce power consumption in my device by disabling the GPIOs ports  clocks.

I did it by writing '0' in the

RCC_AHB1ENR

register at the required locations.

However, It did not work...

Then, I did a little experiment:

at the start of the main() I added these lines:

    RCC->AHB1ENR |= XX;

 

    while(1)

 

    {

 

    }

 

 

and measured the power consumption.

I got these unexpected results:

when XX = 0 I get 52.1 mA (Assume that the PCB consume some of the power)

         XX = 1 I get 64.5 mA (port A itself consume 12 mA???)

         XX = 3 I get 64.5 mA (nothing??)

         XX = 7 I get 64.7 mA (?)

         XX = F I get 64.7 mA (?)

         XX = 1F I get 63.8 mA (port E produce power? nobel prize...)

         XX = 3F I get 65.7 mA

         XX = FF I get 66.1 mA

         XX = 1FF I get 54.3 mA (All the ports together consume less???)

I am really confused...

Am I doing mistake?

Thank in advance for every reply...

Yonatan Sade

[Tesla DeLorean]

Posted on May 04, 2016 at 12:05

Clocking the GPIO banks has more to do with your access to the registers and very little to do with what you are driving externally.

[Danish1]

Posted on May 04, 2016 at 12:54

If you have any GPIO pins that are at a voltage that is neither Vdd nor Vss but somewhere mid-way between (this is likely to happen if you have nothing externally driving the pin) and the GPIO pin is programmed to be a digital (i.e. not analog) input, then you will get ''class A'' current consumed by the GPIO input.

Explanation: Think of the GPIO input as a CMOS inverter. If the input is high, the bottom NMOS transistor is on but the top PMOS one is hard off so no current is used. If the input is low, the top PMOS transistor is on but the bottom NMOS one is hard off so again no current is used. But if the input is mid-way between Vdd and Vss then both transistors are partly turned on and current flows through them from Vdd to Vss.

With stm32 GPIO inputs, this happens once per AHB1 clock cycle - so you will get this class A current burn on floating digital inputs where you have enabled the corresponding AHB1 clock.

Reference manual GPIO section says:

1. 8.3.9  Input configuration 

• The data present on the I/O pin are sampled into the input data register every AHB1 clock cycle 

There are many possible fixes e.g. having your external circuit drive the pin either high or low, setting the pin to be an analog input, setting the pin to be internally pulled-up or pulled-down, setting the pin to be digital output...

Hope this helps,

Danish

[yonatan]

Posted on May 05, 2016 at 10:45

Thank you both, you and clive1.

So what would be a good approach to reduce the power consumption

in this device (not in the L series...)

My general goal is to enter sleep mode (with WFI command) and before turn off a lot of peripherals as possible.

Thank you.

[Walid FTITI_O]

Posted on May 05, 2016 at 11:50

Hi fernandez.sergio,

To reduce power consumption on STM32 devices there is some tips and methods should be applied.

For example, concerning GPIOs:

To avoid extra I/O current, all pins should be configured as analog input (AIN); in this mode the Schmitt trigger input is disabled, providing zero consumption for each I/O pin. We recommend that the I/O speed frequency (driving level) be configured at the lowest possible speed or as an output push-pull configuration, outputting 0 to the ODR.

To see more about other tips and methods for consumption optimization on STM32F4 and how to reproduce all the power modes' consumption values that you find in datasheet (with an

associated

firmware ) , I recommend that you take a look at the application note

http://www.st.com/st-web-ui/static/active/jp/resource/technical/document/application_note/DM00096220.pdf

“Using STM32F4 MCU power modes with best dynamic efficiency�

-Hannibal-