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song
Associate III
January 30, 2015
Question

STM32F4 How to repeatedly enable/disable CHx and CHxN outputs

  • January 30, 2015
  • 4 replies
  • 1283 views
Posted on January 30, 2015 at 09:52

I would like to repeatedly enable/disable TIM1 CH1 and CH1x outputs. Here is my code.

static u8 step = 1;
switch(step)
{
case 1:
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
step = 2;
break;
case 2:
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
step=1; 
break;
}

This part of code is called every 50ms. The duty cycle for CH1 is set to be 50%. What I expected to see is 50ms waveform with PWM output followed by 50ms disabled state output. However, the code didn't work as expected and both CH1 and CH1x continuously output without any disabled status. Would anyone please suggest how to realize the waveform I expected?
    This topic has been closed for replies.

    4 replies

    waclawek.jan
    Super User
    January 30, 2015
    Posted on January 30, 2015 at 10:44

    > This part of code is called every 50ms.

    Are you sure?

    Also, post the content of ALL TIM1 registers before and after the switch.

    JW

    song
    songAuthor
    Associate III
    February 2, 2015
    Posted on February 02, 2015 at 05:44

    In the following picture, channel 1 and 2 are CH1 and CH1x respectively, and channel 3 is the pulses generated by GPIO_ToggleBits(GPIOD, GPIO_Pin_12) I added before the switch command.

    0690X00000605ERQAY.png

    I attached some pictures to show the register values, and you can see the register changed accordingly, but the output of CH1 and CH1x didn't change at all.

    before 

    TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);

    TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);

    CCER = 0x4

    0690X00000602zoQAA.jpg

    after

    TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);

    TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);

    CCER = 0x1;

    0690X00000602ztQAA.jpg

    waclawek.jan
    Super User
    February 2, 2015
    Posted on February 02, 2015 at 08:36

    I asked you for *all* TIM1 registers' content. TIM1 (and TIM8) has more registers than other timers.

    > CR2 == 0x3F01

    Do you understand the implications of this, especially  the CCPC bit being set?

    JW

    song
    songAuthor
    Associate III
    February 3, 2015
    Posted on February 03, 2015 at 02:20

    Thank you so much for pointing out CCPC. I should have read the manual more carefully. Now everything works fine. Thank you very very much.