STM32 FSMC 512x16bit SRAM address mapping
hi, i've some questions regarding the use of 16 bit SRAM with FSMC
using AN2784 section 3.3 on SRAM
in the schematic, IS61WV51216BLL SRAM is used which is a 512 x 16 bit word SRAM.
my question is, do the address lines A0-A18 address individual 16 bit words or do that actually address memory in bytes.
e.g. if A0 = 0, A1 = 1, does this address the 3rd 16 bit word or does that address the 3rd byte in the memory instead? the reason for asking is that for one thing this uses the LB (lower byte) and (upper byte) signals to address individual byte, in particular when writing.
the other reason for asking is:
both
IS61WV51216BLL
http://www.issi.com/WW/pdf/61-64WV51216.pdf
and
IS62WV51216ALL/BLL
http://www.issi.com/WW/pdf/62-65WV51216EALL-BLL.pdf
are 512 x 16 SRAM IS62 being the slower one
however, on closely examining the 2 SRAM sku above, i noted that both are 44 pins TSOP
the data lines and all the other control signals are at the same pinouts
however, the address pins order are completely different some of them reversed in order
if the address lines select 16bit words in the SRAM and STM32 does the mapping internally it would be possible to simply swap and exchange the 2 sku. However, if the address lines select bytes instead swapping the chips would cause data to be trashed
would i be able to swap the above 2 SRAM chips for each other in the same pinouts? i.e. are they 'pin compatible'?
thanks in advance !