STM not respecting recommended design guide for HSE crystal

[Maz D]

Posted on August 16, 2017 at 18:24

I am trying to choose a

crystal 

for the STM32F7. The only problem being is that I cant find a component that respects the recommended values found in the following arm

http://www.st.com/content/ccc/resource/technical/document/application_note/c6/eb/5e/11/e3/69/43/eb/CD00221665.pdf/files/CD00221665.pdf/jcr:content/translations/en.CD00221665.pdf

. Even STM for it's STM32F779I-EVAL board does not respect the gain_margin.

If I have understood correctly there is one main rule governing the choice for a crystal so that the oscillator starts and reaches a stable phase.

gainmargin = gm / gmcrit

gm is the oscillator transconductance specified in the STM32F779 datasheet.

• Gm_crit_max = 0.001

gmcrit is computed from oscillation-loop passive components parameters.

• ESR is the equivalent series resistance 
• C0 is the crystal shunt capacitance
• CL is the crystal nominal load capacitance.
• F is the crystal nominal oscillation frequency

The one used for the eval board is this one :

https://www.eltech.spb.ru/files/item/NX3225HA-STD-CRT-1.pdf

But I found gainmargin = 1.674730 when it's supposed to be >5

Does anyone know why?

#crsytal #oscillator #quartz #stm32f7 #hse

[Maz D]

Posted on August 16, 2017 at 18:30

Seems as though I am not the only one asking the same question. But the answear is not clear as to why there are no crystals that exist that respect the design rules.

https://community.st.com/0D50X00009XkaJBSAZ

 

https://community.st.com/0D50X00009Xke67SAB

 

[Tesla DeLorean]

Posted on August 16, 2017 at 22:17

I suspect the F7 design contains a lot of hindsight..

[STOne-32]

Posted on August 17, 2017 at 00:51

Dear all, 

Having a crystal compatible with our HSE is very important else there is a risk of no oscillation in worst case conditions. 

That NDK crystal is specific for us (STMICROELECTRONICS ) and is not from their public website. Look to the exact reference at the end. 

Cl =6.5pF

C0 = 1.3pF

Esr max = 50 Ohm

F=25MHz

Gm margin = 5/0.3 = 16 >>> 5.

Please do not confuse gm _crit and gm_crit_max  there is a factor of 5 between them.

Cheers 

STOne -32 

[Tesla DeLorean]

Posted on August 17, 2017 at 01:02

>>

That NDK crystal is specific for us (STMICROELECTRONICS ) and is not from their public website.

Does that have an orderable (full qualified) part number? I'd suppose it is in the BOM, but in case it is a special order part it would be good to know not to use an unsuitable, but higher running, substitute. People are apt to copying a known working design. Can you provide the spec sheet for that part?