Need clarifications on CSS of STM32H7

[Gpeti]

Hello,

I don't understand the description of the Clock Security System in the Ref Manual of STM32H7 (section 7.5.3).

First question is : what exactly is the CSS doing ? (what kind of control is done on the clock). What is a definition of "a failure of the HSE" ?

Second question: the ref manual mentions both a dedicated interrupt rcc_hsecss_it and the NMI. Why is there both ? Why not only the NMI or only the interrupt ?

Thank you

[Tomas DRESLER]

When HSE stops ticking (due to xtal failure, PCB crack, short circuit or other), after some timeout the CSS (it's a slow-running resettable oscillator) triggers recovery actions to prevent complete clock loss. The rcc_hsecss_it is an internal signal of CSS and is connected to EXTI and NMI.

EXTI has one special feature - enables waking from STOP mode (of at least one CPU domain).

[Gpeti]

Thank you Tomas, crystal clear. I would suggest to add these precisions in the ref manual.