LRWAN_V1.1.1 example PA0 and PA4

[Lucas Rossouw]

Posted on October 30, 2017 at 10:26

Hi,

I am using the B-L072Z-LRWAN1 board running the End-Node example.

I added 4 GPIO external interrupts on PA0,PA2,PA3 and PA4.

Before the the board goes into Stop Mode all 4 intterupts works as expected.

//----PA0, PA2, PA3 and PA4 EXTI works as expected

    DISABLE_IRQ();

    if ((lora_getDeviceState() == DEVICE_STATE_SLEEP))

    {

         LowPower_Handler();

    }

    ENABLE_IRQ();

//----after the Stop mode exit, I loose control over PA0 and PA4.

I added some debugging and on PA4 it seems that a software interrupt is generated after every lora txDone and rxDone...

I need some help in finding where these two pins are configured in the lora drivers.

Thanks,

Lucas.

[Tesla DeLorean]

Posted on October 30, 2017 at 14:28

Well PA4 is physically wired to the DIO5 pin of the radio

STM32CubeExpansion_LRWAN_V1.1.1\Projects\Multi\Applications\LoRa\PingPong\inc\mlm32l0xx_hw_conf.h

STM32\STM32CubeExpansion_LRWAN_V1.1.1\Drivers\BSP\MLM32L07X01\mlm32l07x01.c

Not sure of PA0, but the EXTI supports one pin# per level, ie one GPIO_PIN_0 in one GPIO BANK

[Lucas Rossouw]

Posted on October 31, 2017 at 06:58

Hi Clive,

I thought PA4 was only physically connection to DIO5 with SB27 which is not fitted.

Maybe I should just use different GPIO's...

Thanks for the answers.

[Tesla DeLorean]

Posted on October 31, 2017 at 17:03

 ,

 ,

The software uses the DIO pins to create EXTI interrupts for reception and transmission, among other things. DIO4/DIO5 typically aren't initialized for that, but do connect to radio. SB27 should disconnect.

PA4 goes to Arduino A2, and A3 via SB8

You might want to remove the ADC related code

STM32CubeExpansion_LRWAN_V1.1.1\Projects\Multi\Applications\LoRa\PingPong\inc\mlm32l0xx_hw_conf.h

...

/* ADC MACRO redefinition */

♯ define BAT_LEVEL_PORT GPIOA //CRF2

 ,

♯ define BAT_LEVEL_PIN GPIO_PIN_4

 ,

♯ define ADC_READ_CHANNEL ADC_CHANNEL_4

 ,

♯ define ADCCLK_ENABLE() __HAL_RCC_ADC1_CLK_ENABLE() ,

 ,

♯ define ADCCLK_DISABLE() __HAL_RCC_ADC1_CLK_DISABLE() ,

Don't really understand the CRF2 reference in this context.