Hello. Should I be concerned about D-cache cleaning and invalidation in DMA functions on STM32H573? I am looking at the bus architecture and I see that DCACHE is connected only to OCTSPI and FMC unlike H7.

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Best answer by Foued_KH

Hello @baranovus ,

Yes,your understand is correct.

Foued

Foued_KHBest answer

ST Employee

Hello @baranovus ,

Yes,your understand is correct.

Foued

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