Does the FMC support bit swapping/byte lane swapping on the STM32H745?

[DBinn.1]

Hi,

Just looking for confirmation that the FMC SDRAM controller supports bit swapping within byte lanes, and byte lane swapping (including the mask bit of course) on the STM32H745.

We are implementing a 32-bit SDRAM interface, and I don't see any mention of JEDEC compliance in the reference manual for the FMC.

Thanks,

Dan

[waclawek.jan]

> Just looking for confirmation that the FMC SDRAM controller supports bit swapping within byte lanes, and byte lane swapping (including the mask bit of course) on the STM32H745.

I don't think the chip has implemented features which are not mentioned in the DS/RM.

JW

[DBinn.1]

Thanks for the fast response, but that would really be an unusual feature to not implement support for, how are you so sure?

[waclawek.jan]

> that would really be an unusual feature to not implement support for

I'm lost in the double negation. Do you want to say that SDRAM controllers without bit swaps are unusual?

JW

[DBinn.1]

Yes, typically SDRAM controllers support bit-swapping within a byte-lane - some also support byte-lane swapping provided you also move the mask bits with the byte properly.