Can Vbat be monitored in Sleep Mode (or another low power mode)?

[JChan.0]

Hi,

I'm using a Nucleo F429ZI and want to use a low power mode after I lose supply power and am relying on a battery (connected to Vbat). I am wondering if it's possible to monitor Vbat while in a low power mode (like Sleep Mode) and what the best way to do that is. Does this require a separate ADC pin or can I do it directly from the Vbat pin internally?

[Jack Peacock_2]

You can take advantage of the ADC analog watchdog. Set it to monitor the Vbat channel, interrupting if outside the watchdog range. You will have to set up the ADC to scan continuous, with a timer as trigger, and DMA to read the results (ideally in a circular buffer). This configuration can run without CPU intervention so you can use sleep mode. It won;t work in standby mode since clocks are stopped. The analog watchdog interrupt will wake the core if the battery sags.

Jack Peacock

[waclawek.jan]

> scan continuous, with a timer as trigger

Isn't this mutually contradicting? Once started, wouldn't continuous ADC run... continuously... without need for any trigger?

> DMA to read the results

AFAIK you don't need that for the ADC watchdog to work. Conversion alone should be enough.

> It won't work in standby mode

... and not even stop mode... (for the same reason)

> monitor the Vbat channel

Don't forget that it means a resistive divider been connected internally to Vbat. I am lazy to look up its value for the 'F429; for 'F407 it's 50kOhm which translates into some 60uA at 3V. Not much compared to the few mA consumption at Sleep mode; but should the software go towards the perhaps more conservative stop/standby+wakeup-then-measure-by-software way, then tens of uA could make significant difference. It certainly does make a difference if the true VBAT mode is used (with all VDD power off), safely killing CRxxxx cells within weeks. Guess how did I find out ;)

JW

[Jack Peacock_2]

Scan continuous in the sense that a timer continuously triggers a scan with some (preferably long) interval between scans to reduce ADC power consumption. The object of sleeping is low power while idle, better to stretch the ADC scans out rather than run ADC continuously without a timer trigger.

DMA clears the ADC data register so the ADC overflow interrupt doesn't wake up the core. Of course you can apply the "ignorance is bliss" design rule and turn off error reporting.

And yes, the scheme is far from ideal because of that 3:1 divider drawing down the Vbat supply. Better to wake up every few seconds (you have to do that anyway if you have IWDG on), turn on the Vbat divider, sample, turn off divider and go back to sleep. If the battery directly powers the STM32 the PVD can be used instead of the ADC to trigger a low battery warning, otherwise a low power comparator on the battery with a hard-wired threshold and output tied to a wakeup pin would work in sleep, stop and standby mode.

Jack Peacock

[Danish1]

What do you want to happen if VBat gets dangerously low?

My understanding is that the cpu can't execute any code powered by VBat - power has to come in on Vdd. It's possible that your Nucleo board has other components that draw excessive power from Vdd.

How rapidly do you expect VBat to drop?

Could you arrange the cpu to wake up periodically from sleep by the real-time-clock, clocked by the 32768 Hz LSE oscillator.

You could make it wake up e.g. once a minute, take a quick measurement and drop back to sleep. Or, if it decides that the voltage is getting dangerously low, take the appropriate action before power fails completely.

On some of my boards I have a supercapacitor charged by my Vdd, which I use to power my real-time-clock over short outages of Vdd. What I found was that if the supercapacitor discharges too far, the LSE oscillator stops running but the contents of the RTC peripheral still look credible once power is restored. What I currently do is periodically write the time to a bit of RAM that is also maintained by VBat . This of course stops when I lose Vdd. If the time in the RTC differs by more than the time I can rely upon for the supercap to keep the RTC ticking, I conclude that I no longer can rely upon the time.

Hope this helps,

Danish