Posted on March 08, 2016 at 16:40The original post was too long to process during our migration. Please click on the attachment to read the original post.
DMA is a basic tenet of Computer Architecture, review standard texts if required.
It is like a hardware memcpy(), paced by the peripheral.The samples appear inADCTripleConvertedValues[0] ADC1, Channel 1ADCTripleConvertedValues[1] ADC2, Channel 1ADCTripleConvertedValues[2] ADC3, Channel 1ADCTripleConvertedValues[3] ADC1, Channel 2...ADCTripleConvertedValues[0 + (SAMPLES / 2)]ADCTripleConvertedValues[1 + (SAMPLES / 2)]ADCTripleConvertedValues[2 + (SAMPLES / 2)]...For the respective HALF of the buffer, as filled at HT (Half Transfer) and TC (Transfer Complete)
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