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Andrei Chichak
Lead
September 25, 2017
Question

A suggestion for a new register in STM32 processors

  • September 25, 2017
  • 0 replies
  • 394 views
Posted on September 25, 2017 at 20:17

When using watchdog timers, the processor resets when your program fails to clear the watchdog timer within a predetermined period. The RCC_CSR has two bits that can be queried at boot time that indicate a watchdog reset, if they fire, leading you in your search for the root cause. 

What would be useful is if the current PC was stored at the beginning of a watchdog reset cycle. That would be such an amazing help in finding the erroneous code, especially when dealing with RTOS' where there are a lot of potential causes.

#architecture #stm32
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