Electrical characteristics of L4 series BOOT0 pin

[maple]

The AN4555 "Getting started with STM32L4 Series..." in 5.1.3 "BOOT0 pin connection" states the following: "The BOOT0 pin of the STM32L4 Series has a lower VIL than the other GPIO, (for details see datasheet I/O static characteristics), thus as it does not fit CMOS requirement, when driven by another CMOS circuit the signal level must be verified."

Yet, nowhere in STM32L431xx datasheet there is any information specific for BOOT0 pin. It seems to be a regular FT I/O pin with same characteristics as any other FT pin.

Which document is correct?

Also, as a side question, are there any drawbacks in directly connecting BOOT0 to the ground? All the examples, including NUCLEO boards have 10-100k pull-down resistors there. It might be useful for development, but I see no point in extra part on production PCB.

[Uwe Bonnes]

6.3.14 I/O port characteristics

BOOT0 I/O input low   level voltage              1.62 V<VDDIOx<3.6 V - - 0.17xVDDIO(3)

Otherwise a resistor at BOOT0 is nit needed, but comes handy when problems arise.

[maple]

Would you mind sharing a link to the source? I am looking at 6.3.14 in May 2018 datasheet revision (https://www.st.com/resource/en/datasheet/stm32l431cc.pdf) and there is no mention of BOOT0 whatsoever, only general I/O pins.

[Tesla DeLorean]

Having it bonded to ground forecloses the ability to recover a bricked device via the system boot loader in several scenarios. A that point you'd need an SWD/JTAG connection to recover. Basically becomes a support / production / test issue.

[TDK]

I’ve been tying it directly to ground on recent boards and do not regret it. One less part is nice. As long as you can use st-link to program. Your design decision.