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Steve Melnikoff
Senior
April 5, 2019
Question

STM32L4 + SD + STM32CubeMX v5.0.0: SD clock speed during call to SDMMC_CmdSendSCR (as part of switch to 4-bit bus) is too fast for many SD cards

  • April 5, 2019
  • 3 replies
  • 5726 views

The function BSP_SD_Init() is called once the basic SD card initialisation is complete, and after the SD clock speed has switched from 400 kHz(*) to full speed.

If the bus has been configured in Cube to use 4-bit mode, the following call chain occurs, which ultimately reads the SD card's SCR register, to check if it supports 4-bit mode:

BSP_SD_Init() -> HAL_SD_ConfigWideBusOperation() -> SD_WideBus_Enable() -> SD_FindSCR() -> SDMMC_CmdSendSCR()

We found that different cards respond differently to this command at full clock speed. Some work most of the time, but sometimes fail. Some respond to the command without error - but report that the register contents (stored in scr) are zero. And some never respond to the command, causing the code to enter the timeout loop - which is unfortunate because SDMMC_DATATIMEOUT is set to (essentially) forever, so the code gets stuck here.

Although the SD spec (if we've understood it correctly) seems to suggest that it should be fine to read the SCR register at any speed, this doesn't seem to be true in practice. So, we modified BSP_SD_Init() to reduce the clock speed to 400 kHz before the call to HAL_SD_ConfigWideBusOperation() - and this solved the problem completely.

It wasn't necessary to change the clock speed back again ourselves, as this happens in HAL_SD_ConfigWideBusOperation() if the SCR read is successful.

So we recommend that ST change the library code, whether in the default BSP_SD_Init() or elsewhere, so that the SCR read occurs at 400 kHz.

(*) Actually, the initialisation SD clock speed is only set to 400 kHz if the SD peripheral clock is 48 MHz, as the library doesn't check what its true value is. Hence SDMMC_INIT_CLK_DIV is fixed at 0x76, giving a divider value of 120. All this means is that if you're using a slower peripheral clock, then the initialisation clock speed will be below 400 kHz. This is harmless, but means that SD setup may take slightly longer.

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3 replies

Technical Moderator
April 15, 2019

Hello @Steve Melnikoff​ ,

Your issue has been raised for check and analysis.

We will come back to you soon with update.

Regards,

Imen

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Steve Melnikoff
Senior
April 23, 2019

Thank you.

Is there any word on whether any of the 4 other bugs I've reported, relating to the SD card drivers, will be reviewed at some point?

Technical Moderator
October 31, 2019

Hello,

The SD specification allow to perform the SEND_SCR command in Data Transfer Mode. It means that the allowed speed is authorized to 25 MHz.

We perform tests with 7 several SD cards from 4 different manufacturers with different capacity without any issue. What are the exact reference of these faulty cards (Manufacturer, Capacity, Class, ...) ?

If there is some communication issue between the host and the card, it is recommended to activate the hardware flow control and/or to change the clock edge.

About the divider in Card identification Mode, the specification indicates we should be at 400 kHz, so in the driver we should take in account the world case. So of course it means it will be slower during the card identification mode if the clock is not configured at 48 MHz.

Best Regards,

Imen

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Matthew Staben
Associate
September 23, 2019

0x76 is not 120.

I noticed that SDMMC_INIT_CLK_DIV is set to 0x76 which does not evenly divide into 48Mhz as does 0x78 (120) making 400Khz.

Tesla DeLorean
Guru
September 23, 2019

RM0386

Bits 7:0 CLKDIV: Clock divide factor This field defines the divide factor between the input clock (SDIOCLK) and the output clock (SDIO_CK): SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]

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Matthew Staben
Associate
September 23, 2019

Got it. Thanks for pointing that out.

RScha.2
Visitor II
March 12, 2020

Can confirm, we have the exact same issue with newer SD card, and running the findSCR function @ 400KHz works. Tested findscr with a variety of SD cards at different clock speeds, with same results, some respond some of the time etc.

Regards

Steve Melnikoff
Senior
March 12, 2020

Glad it's not just us then! :)

RScha.2
Visitor II
March 12, 2020

Thanks for the solution BTW ;) , kept me busy for quite a while, since it only failed sometimes in field, but with newer cards it seemed to be failing more often.