Skip to main content
A
ajimathew
Associate II
August 4, 2023
Solved

SPI shift register

  • August 4, 2023
  • 1 reply
  • 2778 views

      In the block diagram of SPI ,There were 2 FIFOs (Rx and Tx) but only one shift register . In case of Full- duplex communication simultaneous transmission and reception will happen. How one shift register handles both transmitting and recieving??spi.png

 

    This topic has been closed for replies.
    Best answer by TDK

    You shift a bit out at the same time you shift a new one in. For an 8-bit register, it would initially store 8 TX bits, then 7 TX bits and 1 RX bit, etc, until it eventually stores all 8 RX bits and shifts those into the RX FIFO and grabs a new byte from the TX FIFO.

    1 reply

    TDK
    TDKBest answer
    August 4, 2023

    You shift a bit out at the same time you shift a new one in. For an 8-bit register, it would initially store 8 TX bits, then 7 TX bits and 1 RX bit, etc, until it eventually stores all 8 RX bits and shifts those into the RX FIFO and grabs a new byte from the TX FIFO.

    "If you feel a post has answered your question, please click ""Accept as Solution""."
      Terms & ConditionsAccessibility statement