Hello and thank you for taking the time to read and answer my question. What I want to do:I have SYSCLK configured at a frequency of 16 MHz (using HSI), and a PLL block clock with a frequency of 18 MHz.I want to sample the PLL clock on the rising edg...

Hello everyone and thank you for taking the time to read my post. The problem I'm encountering is regarding the configuration of MCO.I configured MCOSEL and MCOPRE to use PLLRCLK with a 1 prescaler value. The PLLR clock is configured with a frequency...