Ask questions on STM32CubeMX. Discuss code generation and configuration challenges, among other topics.
We are pleased to announce that the minor version 6.16.1 of STM32CubeMX is available. What is new in 6.16.1: This release addresses and resolves the issues outlined below: Users of STM32CubeMX version 6.13.0 and later may encounter a HardFault except...
We are pleased to announce that STM32CubeMX 6.16.0 release is available. What is new in 6.16.0: Added support for new microcontrollers across the STM32WBA, STM32N6 and STM32H5 series and the STM32WL3x product line. The related new boards include the...
Hello, We appear to be experiencing a severe code generation bug with CubeMX. After naming and sizing application regions in the memory management tool, what used to generate a correct linker script now generates bad output.Upon generation the linker...
We are using the STM32N657Z0H3Q (142-pin TFBGA package).CSI behavior in STM32CubeMX is inconsistent across versions:In older CubeMX versions(1.64), CSI lanes (CSI_D0P/N, CSI_D1P/N, CSI_CKP/CKN, CSI_REXT, etc.) are displayed in the Pinout view, but t...
Yes I should have taken a backup - but modern software must always have build-in backup solution so you do not corrupt your own files. Ask chatgpt if you need the code. I used 2 days to make this project, luckily I have the main.c so I can copy names...
Hello,Due to limitations with the STM32WBA's silicon & Bluetooth stack we've had to significantly re-engineer our hardware and add an external Bluetooth chip. As part of this, we updated our SAI blocks so that one block is transmit and one is receive...
Hello ST Community,I am writing to report a serious regression in STM32CubeMX 6.16.0 running on Arch Linux (KDE Plasma) with a 1920x1080 resolution.Environment:OS: Arch Linux (Rolling)Java: OpenJDK 25Desktop: KDE Plasma (Wayland/X11)Screen Resolution...
Hello! I have STM32N6570-DK and i would like to disable or make Trust Zone transparent to me and develop the project without safety like your products with cortex M3,M4 and M7 cores with all resources available. I can find some video content on disab...
The STM32H7RS series includes a USB HS PHY with a special PLL that generates the 480MHz clock required as well as a 60MHz clock for the OTG HS peripheral and optionally a 48MHz clock for the separate OTG FS peripheral. The PLL for the USB PHY has sev...
Greetings everyone,Using the C programming language, I'm creating the encryption algorithm AES-256 code for a trusted execution environment and checking to see if the hardware supports it.AES/CRYP enabling is giving me trouble. I can't find it under ...
We are using STM MCU MPN : STM32U375VGT6Q for one of our new projects, we are currently using HSE External 16 MHz crystal for system clock.We are trying to configure the STM32U375 MCU to run at 96 MHz using an HSE external 16 MHz crystal. In STM32Cub...
It seems like CubeMX sets this default value hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; when doing software NSS and SPI Mode 3 like: hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; hspi1.I...
