Stm32h746 dual core debugging

[Jpj.1]

I am working with stm32h745ZIT3, in my application I need to receive some packets over ethernet in CM7 and these packets need to share to CM4, and processing is done in CM4.

So, to test this data transfer I need to debug both cores simultaneously. Tried changing the debug properties as download option disabled for cm4 and add cm4 to cm7s list. and then tried to debug cm7 and then debug cm4, but cm4 shows as no ST detected.

Also, port number changed for both. Is there anything I am missing? please guide me. 

Power: LDO

[Imen.D · Accepted solution]

Hello @Jpj.1 ,

To configure the debugger on STM32H7 dual core, I advise you refer to these tutorials:

• Video: Dual Core Debugging on STM32H7 with STM32CubeIDE
• How to implement inter-processor communication in ... - STMicroelectronics Community

You can also use these application notes as a reference for CM7 and CM4 project configuration :

• AN5286: STM32H7x5/x7 dual-core microcontroller debugging - Application note.

• AN5361 Getting started with projects based on dual-core STM32H7 microcontrollers in STM32CubeIDE.

[Imen.D · Accepted solution]

• AN5361 Getting started with projects based on dual-core STM32H7 microcontrollers in STM32CubeIDE.

[Jpj.1]

Hi Imen,

For inter processor communication is it possible to achieve just by set and resetting a flag with a shared memory.

I updated linker of cm7 as 

MEMORY

{

RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K

FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* Memory is divided. Actual start is 0x08000000 and actual length is 2048K */

DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K

/* ETH_CODE: change offset & reduce size of RAM_D2 to not collide with M4 */

SHARED_MEMORY (xrw) : ORIGIN = 0x30020000, LENGTH = 6K /* 4KB shared region */

RAM_D2 (xrw) : ORIGIN = 0x30030000, LENGTH = 150K

RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K

ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K

}

and variable declared as in a file share.c which is seperate for cm4 and cm7.

volatile uint8_t u32_sharedBuffer_CM7toCM4[1000] __attribute__((section(".SHARED_MEMORY")))= {0};

volatile uint32_t u32_freshDataFlag_CM7toCM4 __attribute__((section(".SHARED_MEMORY")))= 0;

volatile uint32_t u32_busyFlag_CM7toCM4 __attribute__((section(".SHARED_MEMORY")))= 0;

 and in common folder header file of both cores, wrote as

extern volatile uint8_t u32_sharedBuffer_CM7toCM4[1000];

extern volatile uint32_t u32_freshDataFlag_CM7toCM4;

extern volatile uint32_t u32_busyFlag_CM7toCM4;

But with this, when i check the value of variable it shows some 32 bit random values,, Is memory getting corrupted? Is it possible to achieve interprocess communication like this?

Thanks

[Imen.D]

This FAQ responds to the inquiry related to the dual core communication on STM32H7, CM4 & CM7:

STM32H7 Dual-Core: How to communicate between CM4 ... - STMicroelectronics Community

[Jpj.1]

Hi

Now I am able to debug both cores simultaneously with

How to implement inter-processor communication in ... - STMicroelectronics 

But now facing some memory allocation issue. I am using shared memory at location 0x30020000.

MPU Configuration done in CM7 as

void MPU_Config(void)

{

MPU_Region_InitTypeDef MPU_InitStruct = {0};

/* Disables the MPU */

HAL_MPU_Disable();

/** Initializes and configures the Region and the memory to be protected

*/

MPU_InitStruct.Enable = MPU_REGION_ENABLE;

MPU_InitStruct.Number = MPU_REGION_NUMBER0;

MPU_InitStruct.BaseAddress = 0x0;

MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;

MPU_InitStruct.SubRegionDisable = 0x87;

MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;

MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;

MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

HAL_MPU_ConfigRegion(&MPU_InitStruct);

/** Initializes and configures the Region and the memory to be protected

*/

MPU_InitStruct.Number = MPU_REGION_NUMBER1;

MPU_InitStruct.BaseAddress = 0x30020BB8;//0x30021000;

MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;

MPU_InitStruct.SubRegionDisable = 0x0;

MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;

MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

HAL_MPU_ConfigRegion(&MPU_InitStruct);

/** Initializes and configures the Region and the memory to be protected

*/

MPU_InitStruct.Number = MPU_REGION_NUMBER2;

MPU_InitStruct.BaseAddress = 0x30040000;

MPU_InitStruct.Size = MPU_REGION_SIZE_512B;

MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;

MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;

HAL_MPU_ConfigRegion(&MPU_InitStruct);

/* Enables the MPU */

HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

}

Updated linker of CM7 as

MEMORY

{

RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K

FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* Memory is divided. Actual start is 0x08000000 and actual length is 2048K */

DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K

/* ETH_CODE: change offset & reduce size of RAM_D2 to not collide with M4 */

/*SHARED_MEMORY (xrw) : ORIGIN = 0x30020000, LENGTH = 3K */

RAM_D2 (xrw) : ORIGIN = 0x30020BB8, LENGTH = 153K

RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K

ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K

}

.lwip_sec (NOLOAD) :

{

. = ABSOLUTE(0x30040000);

*(.RxDecripSection)

. = ABSOLUTE(0x30040060);

*(.TxDecripSection)

. = ABSOLUTE(0x30040200);

*(.Rx_PoolSection)

} >RAM_D2

and some variables are declared in shared memory region which is accessible from both CM4 and CM7 at location 0x30020000 to 0x300207ff. 

Ethernet data send over udp runs in CM7. When I debug CM7 alone I am able to send and receive data over ethernet. But when CM4 starts debugging ethernet data send fails as pbuf to hold the outgoing data cannot be allocated.

In pbuf.c returns NULL

/* If pbuf is to be allocated in RAM, allocate memory for it. */

p = (struct pbuf *)mem_malloc(alloc_len);

if (p == NULL) {

return NULL;

}

What may be blocking ethernet communication? what memory should i change?

[urbito]

Are you trying to have access to the Ethernet from Both CM4 and CM7 without a semaphore or something? Or you just trying to do something within the CM4 core when you receive data transfered through InterCore from CM7 and that were received through Ethernet?

[Jpj.1]

CM7 only access Ethernet. Data received Via ethernet is shared to CM4 using shared memory allocated. No semaphores used. Busy Flags are used to check whether that shared location is accessed by other core.

Also,

#define MEM_SIZE 131048 /* (10k)*/

/*----- Default Value for H7 devices: 0x30044000 -----*/

#define LWIP_RAM_HEAP_POINTER 0x30020000

tried 

#define MEM_SIZE 12000

/*----- Default Value for H7 devices: 0x30044000 -----*/

#define LWIP_RAM_HEAP_POINTER 0x30044B00

[urbito]

Are you accessing sharing memory "manually" or you using OpenAMP to share the data, genering interrupts and taking the data from the interrupt to a local memory.

Get data from ethernet -> internal CM7 memory -> shared memory through OpenAMP -> Interrupt generated on CM4 -> CM4 take data out of the shared memory on the interrupt function to internal CM4 Memory 

If you interact directly the shared memory, i understand without OpenAmp, it is a challenge (at least for me).

Greetings