Ask questions and find answers on STM32 microprocessors, including hardware, power, DRAM, flashing, interfacing, device tree, and peripherals.
Can someone explain how to build own custom yocto linux ?I have experience with raspberry pi, but stm32mp2 have none normal explanation.I have cloned from git scarthgap branch of poky, meta-openembedded, meta-st-stm32mp and meta-st-openlinux. Also, I...
In accordance with the booting procedure for STM32MP2 https://wiki.st.com/stm32mpu/wiki/STM32MP2_backup_registers#Boot_mode_selection_feature ROM analyzes the BOOT_MODE register and decides to switch to serial boot mode: "The ROM code executes a seri...
My design is based off STM32MP257F-EV1. In which a RTL8211F-CG Ethernet Transceiver is used. My question is on Pin 39 (RSET) of the transceiver. A 2K49 resistor is used. Where does this value come from? Is it a recommendation from Realtek supplier?
We are working on a custom board based on STM32MP257F-AI3. We flashed an X-Linux RT patched image via SD card in boot mode 0001(A35-Master), and in the ST Cube Programmer flashing completed successfully with a "download successful" pop-up in when boo...
Hello,I am working on STM32MP2 using the OpenSTLinux Weston distro and I am modifying the OP-TEE/device-tree files under the external-dt workspace using devtool.I need to remove a pin definition from the CA35 OP-TEE DTS files, but even after rebuild...
hello ST: I used the stm32mp257 platform for KGDB debugging and found that it always resets the watchdog. I tried to disalbe the relevant nodes in the device tree of the kernel and optee: ///kernel： &arm_wdt { /*timeout-sec = <32>; sta...
Hello ,I have developed a custom board using the STM32MP157DAA1. Its design is very similar to the STM32MP157-DK2.I am trying to build and boot TF-A and OPTEE. However, I am encountering an "I/TC: Forced system reset PSCI" error, which causes the sys...
Hello,I am integrating an STPMIC1x component to power my STM32MP153C-based system. This design is closely following the STM32MP157F-DK2 schematic found here. The issue comes from the fact that some of the default output voltages for STPMIC1APQR used ...
Dear Team,We are currently working with the STM32MP257F-DK board and would like to confirm whether the LPDDR4(MT53E1G32D1FW) memory mounted on this board supports inline ECC (Error Correction Code).Could you please provide details on the ECC capabi...
We are using a custom board with STM32MP257F using M33TD flavour, booting from QSPI SNOR. My understanding is that when reset is released, the processor runs some on-chip ROM code, which copies the FSBL from external NV storage into some on-chip RAM ...
