Issue with SPI NSS Pin After Wakeup from Stop2 Mode Causing TX Timeout on SX1262

[SDhar.1]

Hi,

I am using the STM32WB5MMG microcontroller, and I am facing an issue with the SPI NSS pin configuration. Before putting the MCU into Stop2 mode for low-power sleep, I configure the SPI NSS pin (PA4) as analog to reduce current consumption. After the MCU wakes up, I reinitialize all the SPI pins, including setting the NSS pin back to output mode.

However, I am using the SX1262 LoRa module, and it seems that the NSS pin is not functioning correctly after wakeup, leading to a TX timeout. Based on discussions in the LoRa forum, it's mentioned that deinitializing the NSS pin during sleep could cause such issues upon wakeup if the pin is not properly reconfigured.

Could you please guide me on the correct steps or additional configurations needed for proper SPI initialization after waking up from Stop2 mode? Any advice to ensure the NSS pin works correctly after sleep would be helpful.

Thank you!

[Petr Sladecek]

Hello,

you've noted NSS pin as an output, so I suppose the WB device is mastering the bus. Of course, once the NSS flows out from its non active level, it can be understand by slave as a valid communication start what causes synchronization issue (as SCK pin is floating as well great probably). I see only way to assure proper NSS level on the bus by pulling it up when WB performs no control of the NSS signal.

Rgds,

Petr