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Stm32L452 RTC Clock Drift with use---related to entering/exiting shutdown mode?

Associate III

Hi. I'm operating an stm32l452 MCU which enters and exits shutdown mode frequently, and am using the internal RTC of the chip to keep track of time as the days progress. I have noticed that over continued use (with frequent exits/entrances to shutdown mode), the RTC is losing time. Depending on the frequency of shutdowns, the time loss is greater or smaller. The system can exit shutdown mode using either predefined wakeup pins or an alarm (ignoring watchdog and normal power related events).

For example, some data I have collected through use...All of these tests are over 10 minutes. In these tests to speed up automated testing, I forced a watchdog reset at the following intervals.

  • 1 second reset interval: ~22s lost
  • 5 second reset interval: ~12s lost
  • 10 second reset interval: ~9s lost
  • 30 second reset interval: ~6s lost
  • 60 second reset interval: ~3s lost

What I am curious about is that is this expected? Is the entrance/exit to shutdown mode possibly freezing the clock for a split second, and over time this accumulates? Or is this something else entirely and I am looking at a non-factor?

Thank you!

Jack Peacock_2
Senior III

Which low speed oscillator do you use for the RTC? If you are using the LSI then yes, you can expect 5% drift over time. If LSE, do you have the right capacitance for the selected 32.768KHz crystal? There is a procedure for calibrating the LSI, though it has to be done on a frequent basis since the RC oscillator is sensitive to temperature and humidity.

How is the backup domain (i.e. RTC) powered? Do you have continuous power to the STM23, or do you rely on VBAT to power the RTC oscillator in shutdown mode? Does VDD remain on after shutdown?

And last, does your startup procedure correctly detect if the RTC oscillator is already running? If you reset and restart the oscillator you lose the stabilization time.

Jack Peacock

Cube code settng RTC INIT upon each test, resetting subseconds, e.g. ?


I have actually looked at that post.

The thing that didnt make sense to me is if HAL_RTC_Init() is not called after each exit from shutdown mode on my chip, time cannot be successfully retrieved (HAL function errors out). I assume that the reason the init function is called only on reset in that example is because it should be operational otherwise--- so I should be able to retrieve the time accurately in all instances that are not a reset?

Continuing, is entering/exiting shutdown mode considered a reset? If it is, then I need to perform this initialization each time, thus losing the subsecond register (and I am stuck with this loss)?

Yes, i am using the LSE clock source (that is the only one which can operate the RTC in shutdown). I'll check the capacitance to be sure thats correct.

VDD is powered by 1.8V, which stays on during shutdown mode. It powers the MCU in which powers the crystal. The only power lost during shutdown mode is 1V8A, which is the VDDA input.

Regarding your third point, is that related to JW's post below?

Jack Peacock_2
Senior III

An exit from any STANDBY mode like shutdown forces a soft reset for the controller. However, this does not reset the backup domain (i.e. RTC). If your RTCCLK is stopping after an exit (check the LSERDY flag in RCC) then you have some kind of hardware issue that's halting the LSE oscillator. After a soft reset the LSE should still be in the ready condition, which means it's generating a clock signal. Set a breakpoint immediately after reset and check the RCC registers for backup domain.

There appears to be some question if the HAL always determines the correct state of the LSE (JWs post above). I don't use the HAL but I can verify the RTC will keep time with the LSE across a reset (exit from STANDBY mode) if the RTC is not reset in software and backup domain (VBAT pin) remains powered. It does work without HAL, not clearif it works every time with HAL.

Jack Peacock

> The only power lost during shutdown mode is 1V8A, which is the VDDA input.

Suspicious. In most STM32, VDDA must stay close to VDD. Check your STM32 datasheet.

[EDIT] It appears this is not a requirement for the 'L4[/EDIT]

> is entering/exiting shutdown mode considered a reset?

What does the RM say?