STM32 MCUs Products

I2C

STM32L496 errata (ES0335) Dual-bank boot - unable to reproduce - perhaps I didn't understand correctly.

From the ES0335  errata there are two errata that look pretty significant for dual bank boot (which I'm planning to use as the basis of field firmware update):2.2.8 Dual-bank boot not working when the boot in flash memory is selected by BOOT0 pinDesc...

USBX issue in the STM32N657X0H3Q (Nucleo-N657x0-Q) board

  We are working on a bare-metal application using USBX on an STM32N657X0H3Q device.In CubeMX, we configured USB1_OTG_HS under Connectivity and enabled USBX in Middleware. However, when we execute the following function: static void MX_USB1_OTG_HS_P...

STM32N6 is only flashable after POR

Hi,We have a weired problem with a custom N657 design.When using the Nucleo board, its possible to flash the program on the external flash, as long as BOOT1=1.The programmer resets the board and it flashes the firmware normally every time.On our boar...

SAI: SPDIF output in all MCUs ?

Heyho,do all SAIs in all MCUs offer the SPDIF output feature?CubeMx and online MCU selectors do not show this info, no time to check 20 more datasheets.For the few STM32 I know and worked or played with (G4, F7, H7) the answer is yes.Merci!

In the HSE bypass mode of STM32G0B1, the HSERDY bit cannot be set

I am currently using STM32G0B1. I found that when using an active crystal oscillator, the STM32 fails to recognize my crystal oscillator, resulting in the HSERDY bit not being set.This is the configuration of my cubemx.Use an oscilloscope to check if...

Why does PA4 chip select not stay high when configuring PUPDR pull-up on STM32F407VGTX?

Hi,I’m working with the STM32F407VGTX and I am using GPIO PA4 as the SPI chip-select (CS) pin. In my GPIO initialization, I set the PUPDR register to configure PA4 with a pull-up, expecting the CS pin to remain HIGH when idle. However, I observe on m...