How to fix SDIO error HAL_SD_ERROR_RX_OVERRUN
Reply to you How to fix SDIO error HAL_SD_ERROR_RX_OVERRUN? - STMicroelectronics Community SDIO data region should be AXI SRAM.
STM32 MCUs Products
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STM32F407 RAM Interface impedance matching
Hi Team,As we are going to use RAM – IC CY62136EV30 (TSOP-44) in our new project with ST micro STM32F407ZG (LQFP-144).Do we need any impedance matching for 6-layer board?Can you please suggest the same. Crystal frequency we taken 16MHz for the MCU.Th...
STM32H7S XSPI1 Memory Fault Despite Errata Workaround Implementation [Video Attached]
System OverviewHardware ConfigurationMicrocontroller: STM32H7S3L8H6Memory ArchitectureXSPI1 (Flash, MX25UW25645GXDI00): 32MB, accessed via GPIOP/GPIOOClock: PLL2S source, Prescaler = 3flash_xspi_handle.Instance = config->instance; flash_xspi_handle.I...
Flash MX25R6435FM2IL0 interface with STM32N657
I am having a custom board having STM32N657I0H3Q interfaced with quad flash MX25R6435FM2IL0. I am unable to access (both read and write) to the flash MX25R6435FM2IL0.I have attached Saleae capture (configured the flash in single mode only for Saleae ...
800 x 800 Display with STM32U5G9VJT6Q - possible?
Hi,we are trying to get a 800x800 display to work with the STM32U5G9VJT6Q, using either RGB888 or RGB565 in Video Mode (Burst).According to what we read it is definitely possible. Did we miss something?Could someone please confirm that is definitely ...
Using Asymmetric Mode to generate two phase-shifted waves
I am trying to create two phase-shifted PWM waves on an STM32L4 TIM1 using asymmetric mode. From what I understand, I have to:enable output on GPIO channels 1 and 3enable output compare 1,2,3,4 and output compare 1,2,3,4 as asymmetric PWM modeThen, I...
STM32L496 errata (ES0335) Dual-bank boot - unable to reproduce
From the ES0335 errata there are two errata that look pretty significant for dual bank boot (which I'm planning to use as the basis of field firmware update):2.2.8 Dual-bank boot not working when the boot in flash memory is selected by BOOT0 pinDesc...
Resolved! STM32N6: Expected DMA/SPI Performance
Hi,I am working on an application for the STM32N6 (using zephyr) that streams data from four SPI interfaces (SPI1, SPI2, SPI3 and SPI6) via Ethernet (UDP). I am using full-duplex SPI transfers and GPDMA1.Everything works fine up to SPI clock frequenc...
USBX issue in the STM32N657X0H3Q (Nucleo-N657x0-Q) board
We are working on a bare-metal application using USBX on an STM32N657X0H3Q device.In CubeMX, we configured USB1_OTG_HS under Connectivity and enabled USBX in Middleware. However, when we execute the following function: static void MX_USB1_OTG_HS_P...
STM32N6 is only flashable after POR
Hi,We have a weired problem with a custom N657 design.When using the Nucleo board, its possible to flash the program on the external flash, as long as BOOT1=1.The programmer resets the board and it flashes the firmware normally every time.On our boar...
