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Hello,I am implementing SPI master communication on an STM32G474RE, transferring 68 bytes per transaction. However, I am unable to achieve the desired SPI clock speed of 5 MHz—currently the SPI clock only reaches approximately 3 MHz.The system clock ...
On a stm32u5, the SPI3 is in the SmartRun domain, which is designed to work down to STOP2 in autonomous peripheral mode with LPDMA. I'm now wondering if it is also possible to use SPI3 in autonomous mode with GPDMA but only to STOP1? Or do I need to ...
Hi Team, Could you please assist me with the following situation: CANFD is working with FIFO0, but not with FIFO1, same config, using STM32G0B1KEU6. I am using same channel, FDCAN1. I will attach both files for refference. Thank you in advance, A...
Hi, I am trying to reset HRTIM on an external event using TIM1 TRGO as a reset event. I am trying to make a single pulse every 200ms (5Hz) because I want to make a single puls test. However, I also need a high resolution so I can vary the on time and...
Hi,I am experiencing a core freeze issue on STM32H7S3L8 MCU, as described below.In the bootloader, I compute a HASH over the application image stored in external XSPI flash (memory-mapped XIP). After this process, "we believe", the core occasionally ...
Hello ST Expert, On our custom board - USB PD, it has 1. HW: TCPP03-M20 with STM32G0B1CBT6 2. SW: X-CUBE-TCPP 4.2.0 ( USBPD Application 4.2.0 - Dual_Role) 3. SW: Board Part tcpp0203 1.2.3 4. Tools: STM32CubeMX (6.15) & STM32CubeIDE 1.19.0 & STM32Cub...
Hi everyone,I’m working with an STM32H7S3 microcontroller and an external Octo-SPI NOR flash IS25WX064 from ISSI (datasheet: https://www.issi.com/WW/pdf/25LX-WX032-064.pdf)My goal is to get this memory working with ExtMemLoader (including XIP support...
Hi, I am using an STM32H755XIH6 MCU in a custom design. I want to use only LDO supply configuration for the internal power regulator that provides the VCORE and I don't really intend to use the SMPS configuration. My schematic has some hardware mista...
Hello, Can I say that "IDLE" is equivalent to "RTO with 8-10 bits (depending on framing)"?Or are there some other subtle differences? My goal is to transfer received data with DMA and start interpretation of the data when nothing is received on the l...
In rm0316 rev 10 for the stm32F303x, the documentation for the ABRQ bits in the CAN_TSR transmit status register states: Setting this bit has no effect when the mailbox is not pending for transmission. I am finding on my STM32F303 that setting ABRQx ...
