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Hello,I have not found the maximum TRACECLK frequency of the STM32H725 in the documentation. It looks like it is generated by PLL1 with flexible division ratios and thus can attain values that are not realistic for I/Os (100 to 220 MHz for Speed 11 a...
I am having a custom board having STM32N657I0H3Q interfaced with quad flash MX25R6435FM2IL0. I am unable to access (both read and write) to the flash MX25R6435FM2IL0.I have attached Saleae capture (configured the flash in single mode only for Saleae ...
Hello, I am reading 6.3.30 LCD-TFT controller (LTDC) section to interface with DS90C385A (LCD) or ADV7125 (VGA) Assume that LCD Clock (pixel clock) polarity is set to high. Ideally, we can expect rising edge of clock aligned to the middle of the data...
Hello, How to perform dual-core communication on STM32H747?
There is this errata for STM32G0B12.2.10 Prefetch failure when branching across flash memory banksDescriptionIn rare cases, the code prefetch may fail upon branching and function calls across flash memory banks,regardless of the DUAL_BANK and nSWAP_B...
I am using a Nucleo-N657X0-Q board to prototype a data collection system that collects samples from an ADC connected to the SAI peripheral and places the results in RAM. If I use CPU AXI RAM0 as the destination this works correctly, but if I change t...
Hello, I want to design a PCB with STM32H743VIT6 MCU. But I am not sure how can I choose crystal and capacitors properly. In STM32H743VIT6 datasheet there is one section about this topic;according to this information should I take the Cstray value as...
I have seen that it takes about 28 ticks to read registers, so I think my stm32h750 runs really at 17Mhz, it seems is not risk, so perhaps it exists another more fast stm32 micro that have more 17 MIPS
This is a pretty basic question but I would like a bit of clarity if possible.If a GPIO pin is configured for the fsbl code can it also be used in the Appli code?If so how would you go about defining it in the Appli code? There doesn't seem to be an ...
Our company has a chip that outputs data via DCMI, though it does not employ a standard DCMI interface. It lacks a horizontal synchronisation signal, possessing only a vertical synchronisation signal. Could you advise which chips are capable of recei...
