Can the STM32F103 perform a delay of 62 ns or 125 ns?
Hi.I'm not very familiar with STM32 yet.Can STM32F103 delay up to 62ns or 125ns to raise GPIO and lower it again during that time interval?Thank you :)
STM32 MCUs Products
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Can Nucleo H723ZG can interface with an ADC with Serial LVDS
Hello,I had a problem with Nucleo H723ZG ADC, i needed ADC error to be less than 1mV and a sampling rate of 2.5MSPS, but the built-in ADC was having errors around 20mV. (topic).So i decided to proceed with an External ADC, ADS9219 The problem with th...
Whether flow control byte is needed in the SPI frame for STM32F407？
Hi，There is a STM32F407 on my board to configure and control the optical module. Also, STM32F407 use SPI to interface with CPU. STM32F407 work as SPI slave mode, and CPU work as master mode. Some protocol require one flow control byte in SPI timing, ...
Resolved! RXP bit not being after SPI transfer
Hello all, I have been struggling with DMA transfers from SPI transactions and would love a second opinion on what I could be doing wrong. I have confirmed that polling works and I can corroborate the data I see in the RX registers with a scope. I do...
Both OCTOSPI ports memory mapped on STM32H7A3?
Hello,I am having trouble memory mapping both OSPI ports at the same time. Can I run a QSPI Flash on OSPI1 and a OSPI Hyperbus RAM on OSPI2 and have both be memory mapped or do both OSPI ports need to be running in the same mode to be memory mapped?T...
Resolved! STM32H743VIT6 - QSPI XIP (eXecute In Place)
I am evaluating the STM32H743VIT6 microcontroller for my project. I would like to know whether this device supports Execute-In-Place (XIP) from external flash memory through QSPI
Resolved! STM32C092 (TSSOP20) FDCAN Bootloader
Hi everyone, i just want to be sure cause it's the first time playing with the bootloader.I have a STM32C092 (TSSOP20) an i was wondering if i can flash it through FDCAN, but reading the AN2606 i unfortunately found a postilla as following (page71):F...
what would happen when I try to set the ADEN bit to 1 when it is already 1 ?
Hi STWe saw from STM32F302x6/x8 device errata ES0247 - Rev 8 - February 20192.4.4 ADEN bit cannot be set immediately after the ADC calibration is done Description At the end of the ADC calibration, there is an internal reset of ADEN bit 4 ADC clock c...
STM32G431C + ADC + DMA
I'm using ADC with DMA in a large project, and faced some very strange problem: If I'm using DMA2 Channel 6 - ADC works correctly If I'm using DMA2 Channel 1 - the SW end up in Hard Fault The configuration is default. This is how I start the conversa...
Resolved! L1 EEPROM: same as L0 ?
Heyho,still checking L1 for new project, next question:Are the L1's internal EEPROM register interface, erase, read, and write functions the same as on L0 (we're already using that) ?Obrigado!
