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In the lower-end STM32L4, covered by RM0394, SRAM is partitioned into two parts, SRAM1 and SRAM2.SRAM2 (besides being "special" in that it has ECC and automatic erase facities), is mapped at both 0x1000'0000 and at the end of SRAM1 in the 0x200x'xxxx...
I am using STM32G071RBT6. I am trying to implement encoder mode + output compare mode using same timer. Right now initially I get OC interrupt even when Tim_CCR3IF flag is 0 and once it get set it remains as it is. - Should I combine encoder and OC m...
Hi, I’m trying to better understand how the USB PMA and BTABLE work on the STM32F103. After reading the reference manual, I’m still unsure how the descriptor table size relates to the number of endpoints.I have two possible interpretations of how the...
I am using STM32 Nucleo-l476rg. I am trying to use the CAN peripheral and have tried every resource I came across. I am unable to send or receive messages:I have no filter, everything is wired correctly, what could be the issue? I even made it so tha...
Owing to a developer (me) firmware blunder, I successfully "bricked" several STM32C011J6 (SO8 package) devices so that I cannot access them using STM32CubeProgrammer and STLINK.My error was this - my firmware reconfigured pins 7 (SWDIO) and 8 (SWCLK)...
I am encountering an issue with ADC readings on a custom board based on the STM32H533CET6.Hardware Setup: I have a simple analog filter connected to the ADC input. I have verified the input signal with a multimeter, and it correctly varies from 0V to...
Hello, I have a problem that I am having a hard time figuring out.My project is using an STM32H743 as a USB host on a custom PCB. Both OTG_HS and OTG_FS ports are connected to different devices. OTG_HS is using the internal PHY and operating at full-...
Hello everyone,I am trying to bring up a NetX Duo TCP Server on the STM32H755ZIQ Nucleo board using Azure RTOS ThreadX + NetX Duo, but I keep running into issues during initialization and runtime. Unfortunately, I haven't been able to find any fully ...
Hi,I'm facing some issues with some STM32G474RET6s, and want to rule out counterfeit chips, even if that seems unlikely.After googling for some solutions, I confirmed the AP IDR register and the DBGMCU_IDCODE both hold a revision ID of 3, which I exp...
Dear all, i have a problem with my custom board based on STM32H745.I need to use core M4 with USB_HS host with mass storage class (a pen drive) at 12Mbit full speed (internal Phy transceiver).I have configured the processor as per attached file (core...
