Synchronous GPDMA using GPIO and DAC ouptuts

[eosella]

Hi everyone: I'm trying to make an application over the NUCLEO U575zi-q, where some GPIO port pins (in this case, GPIO port E) are triggered in a synchronous way with the DAC output, and the values are held in two arrays, one for the DAC values and the other for the GPIOs pins. GPDMA is triggered usign a timer (TIM2).

I've started with the signal generation example, and made an example where both signals are sent in an apparently synchronous way, which is held in this repo:

https://github.com/osellaesteban/STM32U575ZIT6Q-gpio-dac-dma/tree/main

Based on that, I started modellying my particular application, I've made good advances, but I'm experiencing a very strange errors, since the DAC starts some samples before the GPIO, and after some iterations, the debuger runs to a HardFault_Handler associated to the HardFault_IRQn.

https://github.com/osellaesteban/STM32U575ZIT6Q-gpio-dac-dma/tree/HAL_Implementation

Any Idea on how to debug this kind of errors?

[Sarra.S]

Hello @eosella, 

This could be a synchronization issue, please share you TIM configuration!

The provided links are not functional

[eosella]

First, thanks for your time, and appollogizes for the delay in my answer.

Sorry, I didn't realized that the repos were private. Now I've set them to public. Both forks have the same configuration for the timers, periphereals and DMA.The main fork is the first operative test fork, where I've used a simple test case, with small vectors.

Once I got both signals output, then I tried to move to the HAL version, in order to use it in my application context. There, I get the following errors in the registers

* SCB->HFSR = 0x40000000

* SCB->CFSR = 0x8200

* SCB->BFAR = 0xc

* SCB->SHCSR = 0x4

Any idea?

Thanks!

[eosella]

Hi @Sarra.S ... still lost. I've simplified the pretended HAL implementation and setted in a new fork: The working example is hosted in https://github.com/osellaesteban/STM32U575ZIT6Q-gpio-dac-dma
This main example works fine, without hard faults.

Then, I forked an attempt to perform the HAL implementation, which is held in https://github.com/osellaesteban/STM32U575ZIT6Q-gpio-dac-dma/tree/HAL_Implementation2
In this last repo, I took the operative functions and took it to the st_STM32_HAL.c file (and its header).

When running this example, it goes to the hardfault in stm32u5xx_it.c, line 89.

Under this situation, the register errors get the following values
SCB->HFSR = 0x40000000
* SCB->CFSR = 0x8200
* SCB->BFAR = 0xc
* SCB->SHCSR = 0x4

Any help will be appreciated!