/*
 * usart.c
 *
 *  Created on: Apr 17, 2012
 *      Author: Giovanni Lacava
 */

#include "usart.h"
#include "rbt.h"

 DMA_InitTypeDef  DMA_InitStructure[6];
 USART_InitTypeDef USART_Struct[6];
 GPIO_InitTypeDef GPIO_Struct[6];

__IO uint32_t TimeOut = 0x0;
struct port com[6]; //  usart array  configure structure

extern uint8_t Buf_tx[];
extern uint8_t Buf_rx[];
extern uint8_t packet_data[];

/*extern uint16_t Buf_tx;
extern uint16_t Buf_rx;*/



void RBT_pack(uint8_t packetType,uint8_t opCode,uint16_t dataLenght,uint8_t* packetData,uint8_t* packet){


	packet[0]=STX;
	packet[1]=packetType;
	packet[2]=opCode;
	packet[3]=0xFF & dataLenght;
	packet[4]=0xFF & (dataLenght>>8);
	uint16_t checksum;
	checksum=packet[1]+packet[2]+packet[3]+packet[4];
	packet[5]= (uint8_t)(0xFF & checksum);
    int j;
    for(j=0;j<dataLenght;j++){
    	packet[j+6]=packetData[j];
    }
    packet[6+dataLenght]=ETX;
}

void RBT_unpack(uint8_t packetType,uint8_t opCode,uint8_t* packet){

uint8_t size_data;
if((packet[0])==STX){
	           if((packet[1])==packetType){
	        	             if((packet[2])==opCode){
	        	            	 size_data=packet[3];
	        	            	 int j;
	        	            	 for(j=0;j<size_data;j++){
	        	            		      packet_data[j]=packet[j+6];
	        	            	                          }
	        	                                     }
	                                       }

                       }

}


void RBT_reset(int uart){
	uint8_t packet[7];
	uint8_t null[0]={};
	RBT_pack(REQ,RESET_1,0,null,packet);
	send(uart,packet,7);
}


void RBT_inquiry(int uart){
	//GAP_INQUIRY
	uint8_t vect[3]={0x01,0x02,0x00};
	uint8_t vect_1[10];

	  RBT_pack(REQ,GAP_INQUIRY,3,vect,vect_1);
	  send(uart,vect_1,10);
}


/* In questa funzione inizializzo tutti i campi dell'array di struct port denominato "com" con il
 puntatore a tale array denominato "active" */

void init_port(){

	 /* Definition for USART 1 resources ********************************************/

	  com[0].USARTx= USART1;
	  com[0].USARTx_CLK=RCC_APB2Periph_USART1;
	  com[0].USARTx_IRQn=USART1_IRQn;


	  com[0].USARTx_TX_PIN = GPIO_Pin_10;
	  com[0].USARTx_TX_GPIO_PORT = GPIOA;
	  com[0].USARTx_TX_GPIO_CLK = RCC_AHB1Periph_GPIOA;
	  com[0].USARTx_TX_SOURCE =GPIO_PinSource10;
	  com[0].USARTx_TX_AF=GPIO_AF_USART1;

	  com[0].USARTx_RX_PIN=GPIO_Pin_11;
	  com[0].USARTx_RX_GPIO_PORT=GPIOA;
	  com[0].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOA;
	  com[0].USARTx_RX_SOURCE=GPIO_PinSource11;
	  com[0].USARTx_RX_AF=GPIO_AF_USART1;

	  /* Definition for DMAx (USART 1) resources **********************************************/
	  com[0].USARTx_DR_ADDRESS=((uint32_t)USART1 + 0x04);

	  com[0].USARTx_DMA=DMA2;
	  com[0].USARTx_DMAx_CLK =RCC_AHB1Periph_DMA2;

	  com[0].USARTx_TX_DMA_CHANNEL =DMA_Channel_4;
	  com[0].USARTx_TX_DMA_STREAM =DMA2_Stream7;
	  com[0].USARTx_TX_DMA_FLAG_FEIF= DMA_FLAG_FEIF7;
	  com[0].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF7;
	  com[0].USARTx_TX_DMA_FLAG_TEIF =DMA_FLAG_TEIF7;
	  com[0].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF7;
	  com[0].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF7;

	  com[0].USARTx_RX_DMA_CHANNEL=DMA_Channel_4;
	  com[0].USARTx_RX_DMA_STREAM=DMA2_Stream5;
	  com[0].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF5;
	  com[0].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF5;
	  com[0].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF5;
	  com[0].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF5;
	  com[0].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF5;

	  com[0].USARTx_DMA_TX_IRQn=DMA2_Stream7_IRQn;
	  com[0].USARTx_DMA_RX_IRQn= DMA2_Stream5_IRQn;

	  com[0].Flag_status_active=0;


			      /* Definition for USART 2 resources ********************************************/

	              com[1].USARTx=USART2;
	              com[1].USARTx_CLK =RCC_APB1Periph_USART2;
	              com[1].USARTx_IRQn=USART2_IRQn;


	              com[1].USARTx_TX_PIN=GPIO_Pin_2;
	              com[1].USARTx_TX_GPIO_PORT=GPIOA;
	              com[1].USARTx_TX_GPIO_CLK=RCC_AHB1Periph_GPIOA;
	              com[1].USARTx_TX_SOURCE=GPIO_PinSource2;
	              com[1].USARTx_TX_AF=GPIO_AF_USART2;

	              com[1].USARTx_RX_PIN=GPIO_Pin_3;
	              com[1].USARTx_RX_GPIO_PORT=GPIOA;
	              com[1].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOA;
	              com[1].USARTx_RX_SOURCE=GPIO_PinSource3;
	              com[1].USARTx_RX_AF=GPIO_AF_USART2;

			      /* Definition for DMAx (USART 2) resources **********************************************/
	              com[1].USARTx_DR_ADDRESS=((uint32_t)USART2 + 0x04);

	              com[1].USARTx_DMA=DMA1;
	              com[1].USARTx_DMAx_CLK=RCC_AHB1Periph_DMA1;

	              com[1].USARTx_TX_DMA_CHANNEL=DMA_Channel_4;
	              com[1].USARTx_TX_DMA_STREAM=DMA1_Stream6;
	              com[1].USARTx_TX_DMA_FLAG_FEIF=DMA_FLAG_FEIF6;
	              com[1].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF6;
	              com[1].USARTx_TX_DMA_FLAG_TEIF=DMA_FLAG_TEIF6;
	              com[1].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF6;
	              com[1].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF6;

	              com[1].USARTx_RX_DMA_CHANNEL=DMA_Channel_4;
	              com[1].USARTx_RX_DMA_STREAM=DMA1_Stream5;
	              com[1].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF5;
	              com[1].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF5;
	              com[1].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF5;
	              com[1].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF5;
	              com[1].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF5;

	              com[1].USARTx_DMA_TX_IRQn=DMA1_Stream6_IRQn;
	              com[1].USARTx_DMA_RX_IRQn=DMA1_Stream5_IRQn;

	              com[1].Flag_status_active=0;



		      /* Definition for USART 3 resources ********************************************/

	              com[2].USARTx=USART3;
	              com[2].USARTx_CLK=RCC_APB1Periph_USART3;
	              com[2].USARTx_IRQn=USART3_IRQn;


	              com[2].USARTx_TX_PIN=GPIO_Pin_8;
	              com[2].USARTx_TX_GPIO_PORT=GPIOD;
	              com[2].USARTx_TX_GPIO_CLK=RCC_AHB1Periph_GPIOD;
	              com[2].USARTx_TX_SOURCE=GPIO_PinSource8;
	              com[2].USARTx_TX_AF=GPIO_AF_USART3;

	              com[2].USARTx_RX_PIN=GPIO_Pin_9;
	              com[2].USARTx_RX_GPIO_PORT=GPIOD;
	              com[2].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOD;
	              com[2].USARTx_RX_SOURCE=GPIO_PinSource9;
	              com[2].USARTx_RX_AF=GPIO_AF_USART3;

		      /* Definition for DMAx (USART 3) resources **********************************************/
	              com[2].USARTx_DR_ADDRESS=((uint32_t)USART3 + 0x04);

	              com[2].USARTx_DMA=DMA1;
	              com[2].USARTx_DMAx_CLK=RCC_AHB1Periph_DMA1;

	              com[2].USARTx_TX_DMA_CHANNEL=DMA_Channel_4;
	              com[2].USARTx_TX_DMA_STREAM=DMA1_Stream3;
	              com[2].USARTx_TX_DMA_FLAG_FEIF=DMA_FLAG_FEIF3;
	              com[2].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF3;
	              com[2].USARTx_TX_DMA_FLAG_TEIF=DMA_FLAG_TEIF3;
	              com[2].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF3;
	              com[2].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF3;

	              com[2].USARTx_RX_DMA_CHANNEL=DMA_Channel_4;
	              com[2].USARTx_RX_DMA_STREAM=DMA1_Stream1;
	              com[2].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF1;
	              com[2].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF1;
	              com[2].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF1;
	              com[2].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF1;
	              com[2].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF1;

	              com[2].USARTx_DMA_TX_IRQn=DMA1_Stream3_IRQn;
	              com[2].USARTx_DMA_RX_IRQn= DMA1_Stream1_IRQn;

	              com[2].Flag_status_active=0;

		    	  /* Definition for UART 4 resources ********************************************/

	              com[3].USARTx=UART4;
	              com[3].USARTx_CLK=RCC_APB1Periph_UART4;
	              com[3].USARTx_IRQn=UART4_IRQn;


	              com[3].USARTx_TX_PIN=GPIO_Pin_10;
	              com[3].USARTx_TX_GPIO_PORT=GPIOC;
	              com[3].USARTx_TX_GPIO_CLK=RCC_AHB1Periph_GPIOC;
	              com[3].USARTx_TX_SOURCE=GPIO_PinSource10;
	              com[3].USARTx_TX_AF=GPIO_AF_UART4;

	              com[3].USARTx_RX_PIN=GPIO_Pin_11;
	              com[3].USARTx_RX_GPIO_PORT=GPIOC;
	              com[3].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOC;
	              com[3].USARTx_RX_SOURCE=GPIO_PinSource11;
	              com[3].USARTx_RX_AF=GPIO_AF_UART4;

		    	  	      /* Definition for DMAx (UART 4)resources **********************************************/
	              com[3].USARTx_DR_ADDRESS=((uint32_t)UART4 + 0x04);

	              com[3].USARTx_DMA=DMA1;
	              com[3].USARTx_DMAx_CLK=RCC_AHB1Periph_DMA1;

	              com[3].USARTx_TX_DMA_CHANNEL=DMA_Channel_4;
	              com[3].USARTx_TX_DMA_STREAM=DMA1_Stream4;
	              com[3].USARTx_TX_DMA_FLAG_FEIF=DMA_FLAG_FEIF4;
	              com[3].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF4;
	              com[3].USARTx_TX_DMA_FLAG_TEIF=DMA_FLAG_TEIF4;
	              com[3].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF4;
	              com[3].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF4;

	              com[3].USARTx_RX_DMA_CHANNEL=DMA_Channel_4;
	              com[3].USARTx_RX_DMA_STREAM=DMA1_Stream2;
	              com[3].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF2;
	              com[3].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF2;
	              com[3].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF2;
	              com[3].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF2;
	              com[3].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF2;

	              com[3].USARTx_DMA_TX_IRQn=DMA1_Stream4_IRQn;
	              com[3].USARTx_DMA_RX_IRQn=DMA1_Stream2_IRQn;

	              com[3].Flag_status_active=0;


			      /* Definition for UART 5 resources ********************************************/

	              com[4].USARTx=UART5;
	              com[4].USARTx_CLK=RCC_APB1Periph_UART5;
	              com[4].USARTx_IRQn=UART5_IRQn;


	              com[4].USARTx_TX_PIN=GPIO_Pin_12;
	              com[4].USARTx_TX_GPIO_PORT=GPIOC;
	              com[4].USARTx_TX_GPIO_CLK=RCC_AHB1Periph_GPIOC;
	              com[4].USARTx_TX_SOURCE=GPIO_PinSource12;
	              com[4].USARTx_TX_AF=GPIO_AF_UART5;

	              com[4].USARTx_RX_PIN=GPIO_Pin_2;
	              com[4].USARTx_RX_GPIO_PORT=GPIOD;
	              com[4].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOD;
	              com[4].USARTx_RX_SOURCE=GPIO_PinSource2;
	              com[4].USARTx_RX_AF=GPIO_AF_UART5;

			      /* Definition for DMAx (UART 5) resources **********************************************/
	              com[4].USARTx_DR_ADDRESS=((uint32_t)UART5 + 0x04);

	              com[4].USARTx_DMA=DMA1;
	              com[4].USARTx_DMAx_CLK=RCC_AHB1Periph_DMA1;

	              com[4].USARTx_TX_DMA_CHANNEL=DMA_Channel_4;
	              com[4].USARTx_TX_DMA_STREAM=DMA1_Stream7;
	              com[4].USARTx_TX_DMA_FLAG_FEIF=DMA_FLAG_FEIF7;
	              com[4].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF7;
	              com[4].USARTx_TX_DMA_FLAG_TEIF=DMA_FLAG_TEIF7;
	              com[4].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF7;
	              com[4].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF7;

	              com[4].USARTx_RX_DMA_CHANNEL=DMA_Channel_4;
	              com[4].USARTx_RX_DMA_STREAM=DMA1_Stream0;
	              com[4].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF0;
	              com[4].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF0;
	              com[4].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF0;
	              com[4].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF0;
	              com[4].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF0;

	              com[4].USARTx_DMA_TX_IRQn=DMA1_Stream7_IRQn;
	              com[4].USARTx_DMA_RX_IRQn=DMA1_Stream0_IRQn;

	              com[4].Flag_status_active=0;


			      /* Definition for USART 6 resources ********************************************/

	              com[5].USARTx=USART6;
	              com[5].USARTx_CLK=RCC_APB2Periph_USART6;
	              com[5].USARTx_IRQn=USART6_IRQn;

	              com[5].USARTx_TX_PIN=GPIO_Pin_6;
	              com[5].USARTx_TX_GPIO_PORT=GPIOC;
	              com[5].USARTx_TX_GPIO_CLK=RCC_AHB1Periph_GPIOC;
	              com[5].USARTx_TX_SOURCE=GPIO_PinSource6;
	              com[5].USARTx_TX_AF=GPIO_AF_USART6;

	              com[5].USARTx_RX_PIN=GPIO_Pin_7;
	              com[5].USARTx_RX_GPIO_PORT=GPIOC;
	              com[5].USARTx_RX_GPIO_CLK=RCC_AHB1Periph_GPIOC;
	              com[5].USARTx_RX_SOURCE=GPIO_PinSource7;
	              com[5].USARTx_RX_AF=GPIO_AF_USART6;

			      /* Definition for DMAx (USART 6) resources **********************************************/
	              com[5].USARTx_DR_ADDRESS=((uint32_t)USART6 + 0x04);

	              com[5].USARTx_DMA=DMA2;
	              com[5].USARTx_DMAx_CLK=RCC_AHB1Periph_DMA2;

	              com[5].USARTx_TX_DMA_CHANNEL=DMA_Channel_5;
	              com[5].USARTx_TX_DMA_STREAM=DMA2_Stream6;
	              com[5].USARTx_TX_DMA_FLAG_FEIF=DMA_FLAG_FEIF6;
	              com[5].USARTx_TX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF6;
	              com[5].USARTx_TX_DMA_FLAG_TEIF=DMA_FLAG_TEIF6;
	              com[5].USARTx_TX_DMA_FLAG_HTIF=DMA_FLAG_HTIF6;
	              com[5].USARTx_TX_DMA_FLAG_TCIF=DMA_FLAG_TCIF6;

	              com[5].USARTx_RX_DMA_CHANNEL=DMA_Channel_5;
	              com[5].USARTx_RX_DMA_STREAM=DMA2_Stream1;
	              com[5].USARTx_RX_DMA_FLAG_FEIF=DMA_FLAG_FEIF1;
	              com[5].USARTx_RX_DMA_FLAG_DMEIF=DMA_FLAG_DMEIF1;
	              com[5].USARTx_RX_DMA_FLAG_TEIF=DMA_FLAG_TEIF1;
	              com[5].USARTx_RX_DMA_FLAG_HTIF=DMA_FLAG_HTIF1;
	              com[5].USARTx_RX_DMA_FLAG_TCIF=DMA_FLAG_TCIF1;

	              com[5].USARTx_DMA_TX_IRQn=DMA2_Stream6_IRQn;
	              com[5].USARTx_DMA_RX_IRQn=DMA2_Stream1_IRQn;

	              com[5].Flag_status_active=0;

/* General Configuration */


	              int j;
	              for(j=0;j<6;j++){


	                  /* Configure DMA controller to manage USART TX and RX DMA request ----------*/
	                        DMA_InitStructure[j].DMA_PeripheralInc = DMA_PeripheralInc_Disable;
	                   	    DMA_InitStructure[j].DMA_MemoryInc = DMA_MemoryInc_Enable;
	                   	    DMA_InitStructure[j].DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
	                   	    DMA_InitStructure[j].DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
	                   	    DMA_InitStructure[j].DMA_Mode = DMA_Mode_Normal;
	                   	    DMA_InitStructure[j].DMA_Priority = DMA_Priority_High;
	                   	    DMA_InitStructure[j].DMA_FIFOMode = DMA_FIFOMode_Enable;
	                   	    DMA_InitStructure[j].DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
	                   	    DMA_InitStructure[j].DMA_MemoryBurst = DMA_MemoryBurst_Single;
	                   	    DMA_InitStructure[j].DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

	                      /* Here only the unchanged parameters of the DMA initialization structure are
	                         configured. During the program operation, the DMA will be configured with
	                         different parameters according to the operation phase */



	      	    /*usart*/
	    	    USART_Struct[j].USART_BaudRate =  921600;
	    	    USART_Struct[j].USART_WordLength = USART_WordLength_8b;
	    	    USART_Struct[j].USART_StopBits = USART_StopBits_1;
	    	    /* When using Parity the word length must be configured to 9 bits */
	    	    USART_Struct[j].USART_Parity = USART_Parity_No;
	    	    USART_Struct[j].USART_HardwareFlowControl = USART_HardwareFlowControl_None;
	    	    USART_Struct[j].USART_Mode = USART_Mode_Rx | USART_Mode_Tx;

	      	    /*GPIO port*/
	    	    GPIO_Struct[j].GPIO_Mode = GPIO_Mode_AF;
	    	    GPIO_Struct[j].GPIO_Speed = GPIO_Speed_100MHz;
	    	    GPIO_Struct[j].GPIO_OType = GPIO_OType_PP;
	    	    GPIO_Struct[j].GPIO_PuPd = GPIO_PuPd_UP;

	                              }
}


/* Con tale funzione invece utilizzo i campi inizializzati con la funzione "init_port()" per
 configurare la uart e il dma */

void USART_CONFIG(int USART_ID){


	 //USART_InitTypeDef USART_Struct;
	 //GPIO_InitTypeDef GPIO_Struct;

     int ID;
     ID=USART_ID;

 switch (ID)
	    {

	      case  1:
	    	  com[0].Flag_status_active=1;

	        break;


	      case  2:
	    	  com[1].Flag_status_active=1;
	        break;

	      case 3:

	    	  com[2].Flag_status_active=1;

	        break;

	      case  4:

	    	  com[3].Flag_status_active=1;
	        break;

	      case  5:
	    	  com[4].Flag_status_active=1;
	        break;

	      case  6:

	    	  com[5].Flag_status_active=1;
	        break;


	      default:

	        break;
	    }



 if((com[ID-1].Flag_status_active)!= 0){

	    /* Peripheral Clock Enable -------------------------------------------------*/
	    /* Enable GPIO clock */

	    RCC_AHB1PeriphClockCmd(com[ID-1].USARTx_TX_GPIO_CLK | com[ID-1].USARTx_RX_GPIO_CLK, ENABLE);

	    /* Enable USART clock */

	   if((ID==1)||(ID==6)){
	    	RCC_APB2PeriphClockCmd(com[ID-1].USARTx_CLK, ENABLE);
	               }
	   else{
		   RCC_APB1PeriphClockCmd(com[ID-1].USARTx_CLK, ENABLE);
	       }

	    /* Enable the DMA clock */
	    RCC_AHB1PeriphClockCmd(com[ID-1].USARTx_DMAx_CLK, ENABLE);

	    /* USARTx GPIO configuration -----------------------------------------------*/
	    /* Connect USART pins to AF7 */

	    GPIO_PinAFConfig(com[ID-1].USARTx_TX_GPIO_PORT, com[ID-1].USARTx_TX_SOURCE, com[ID-1].USARTx_TX_AF);
	    GPIO_PinAFConfig(com[ID-1].USARTx_RX_GPIO_PORT, com[ID-1].USARTx_RX_SOURCE, com[ID-1].USARTx_RX_AF);

	    /* Configure USART Tx and Rx as alternate function push-pull */

	    GPIO_Struct[ID-1].GPIO_Pin = com[ID-1].USARTx_TX_PIN;
	    GPIO_Init(com[ID-1].USARTx_TX_GPIO_PORT, &GPIO_Struct[ID-1]);

	    GPIO_Struct[ID-1].GPIO_Pin = com[ID-1].USARTx_RX_PIN;
	    GPIO_Init(com[ID-1].USARTx_RX_GPIO_PORT, &GPIO_Struct[ID-1]);

	    /* USARTx configuration ----------------------------------------------------*/
	    /* Enable the USART OverSampling by 8 */

	    USART_OverSampling8Cmd(com[ID-1].USARTx, ENABLE);

	    /* USARTx configured as follow:
	          - BaudRate = 5250000 baud
	  		   - Maximum BaudRate that can be achieved when using the Oversampling by 8
	  		     is: (USART APB Clock / 8)
	  			 Example:
	  			    - (USART3 APB1 Clock / 8) = (42 MHz / 8) = 5250000 baud
	  			    - (USART1 APB2 Clock / 8) = (84 MHz / 8) = 10500000 baud
	  		   - Maximum BaudRate that can be achieved when using the Oversampling by 16
	  		     is: (USART APB Clock / 16)
	  			 Example: (USART3 APB1 Clock / 16) = (42 MHz / 16) = 2625000 baud
	  			 Example: (USART1 APB2 Clock / 16) = (84 MHz / 16) = 5250000 baud
	          - Word Length = 8 Bits
	          - one Stop Bit
	          - No parity
	          - Hardware flow control disabled (RTS and CTS signals)
	          - Receive and transmit enabled
	    */

	    USART_Init(com[ID-1].USARTx, &USART_Struct[ID-1]);




	    /* Configure DMA controller to manage USART TX and RX DMA request ----------*/
	    DMA_InitStructure[ID-1].DMA_PeripheralBaseAddr = com[ID-1].USARTx_DR_ADDRESS;
	    /* Here only the unchanged parameters of the DMA initialization structure are
	       configured. During the program operation, the DMA will be configured with
	       different parameters according to the operation phase */

	    /* Enable USART */
	    USART_Cmd(com[ID-1].USARTx, ENABLE);

                       }
 }



void de_init_port(int n_port){

	int ID=n_port;
	com[ID-1].Flag_status_active=0;
}


/* Send dei dati tramite DMA */
void send(int USART_ID,uint8_t* tx,int size){

	int ID;
	ID=USART_ID;
	int i;
	for(i=0;i<size;i++){
		Buf_tx[i]=tx[i];
	}

    /******************************************************************************/
    /*                      USART in Transmitter Mode                             */
    /******************************************************************************/
    //#ifdef USART_TRANSMITTER_MODE

        /* Clear Buffers */

	if((com[ID-1].Flag_status_active)!= 0){

        DMA_DeInit(com[ID-1].USARTx_TX_DMA_STREAM);
        DMA_InitStructure[ID-1].DMA_Channel = com[ID-1].USARTx_TX_DMA_CHANNEL;
        DMA_InitStructure[ID-1].DMA_DIR = DMA_DIR_MemoryToPeripheral;

        /****************** USART will Transmit Specific Command ******************/
        /* Prepare the DMA to transfer the transaction command (2bytes) from the
           memory to the USART */
        DMA_InitStructure[ID-1].DMA_Memory0BaseAddr = (uint32_t)Buf_tx;
        DMA_InitStructure[ID-1].DMA_BufferSize = (uint8_t)size;
        DMA_Init(com[ID-1].USARTx_TX_DMA_STREAM, &DMA_InitStructure[ID-1]);



          /* Enable the USART DMA requests */
          USART_DMACmd(com[ID-1].USARTx, USART_DMAReq_Tx, ENABLE);

          /* Clear the TC bit in the SR register by writing 0 to it */
          USART_ClearFlag(com[ID-1].USARTx, USART_FLAG_TC);

          /* Enable the DMA TX Stream, USART will start sending the command code (2bytes) */
          DMA_Cmd(com[ID-1].USARTx_TX_DMA_STREAM, ENABLE);

          /* Wait the USART DMA Tx transfer complete or time out */
          TimeOut = USER_TIMEOUT;
          while ((DMA_GetFlagStatus(com[ID-1].USARTx_TX_DMA_STREAM, com[ID-1].USARTx_TX_DMA_FLAG_TCIF) == RESET))
          {
          }



          /* The software must wait until TC=1. The TC flag remains cleared during all data
             transfers and it is set by hardware at the last frame’s end of transmission*/
          while ((USART_GetFlagStatus(com[ID-1].USARTx, USART_FLAG_TC) == RESET)&&(TimeOut != 0))
          {
          }


          /* Clear DMA Streams flags */
          DMA_ClearFlag(com[ID-1].USARTx_TX_DMA_STREAM, com[ID-1].USARTx_TX_DMA_FLAG_HTIF | com[ID-1].USARTx_TX_DMA_FLAG_TCIF);

          /* Disable the DMA Streams */
          DMA_Cmd(com[ID-1].USARTx_TX_DMA_STREAM, DISABLE);

          /* Disable the USART Tx DMA request */
          USART_DMACmd(com[ID-1].USARTx, USART_DMAReq_Tx, DISABLE);
	}
	else{}


}






/* Receive dei dati tramite DMA */
void receive(int USART_ID){

	int ID=USART_ID;
int size_1=Buf_rx[3];
int size=7+size_1;


	if((com[ID-1].Flag_status_active)!= 0){

    DMA_DeInit(com[ID-1].USARTx_RX_DMA_STREAM);
    DMA_InitStructure[ID-1].DMA_Channel = com[ID-1].USARTx_RX_DMA_CHANNEL;
    DMA_InitStructure[ID-1].DMA_DIR = DMA_DIR_PeripheralToMemory;

    /****************** USART will Receive Specific Command *******************/
    /* Configure the DMA to receive 2 bytes (transaction command), in case of USART receiver */

    DMA_InitStructure[ID-1].DMA_Memory0BaseAddr = (uint32_t)Buf_rx;  // metti il byte in data
    DMA_InitStructure[ID-1].DMA_BufferSize = (uint8_t)size;          // 1 solo!
    DMA_Init(com[ID-1].USARTx_RX_DMA_STREAM, &DMA_InitStructure[ID-1]);

    /* Enable the USART Rx DMA request */
    USART_DMACmd(com[ID-1].USARTx, USART_DMAReq_Rx, ENABLE);
    /* Enable the DMA RX Stream */
    DMA_Cmd(com[ID-1].USARTx_RX_DMA_STREAM, ENABLE);

    /* Wait the USART DMA Rx transfer complete (to receive the transaction command) */
    while (DMA_GetFlagStatus(com[ID-1].USARTx_RX_DMA_STREAM, com[ID-1].USARTx_RX_DMA_FLAG_TCIF) == RESET)
    {
    }

    /* Clear all DMA Streams flags */
    DMA_ClearFlag(com[ID-1].USARTx_RX_DMA_STREAM, com[ID-1].USARTx_RX_DMA_FLAG_HTIF | com[ID-1].USARTx_RX_DMA_FLAG_TCIF);

    /* Disable the DMA Rx Stream */
    DMA_Cmd(com[ID-1].USARTx_RX_DMA_STREAM, DISABLE);

    /* Disable the USART Rx DMA requests */
    USART_DMACmd(com[ID-1].USARTx, USART_DMAReq_Rx, DISABLE);
	}

	else{}
}